/* * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 */ /* Include esp-idf headers first to avoid redefining BIT() macro */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define HDR_ATTR __attribute__((section(".entry_addr"))) __attribute__((used)) void __appcpu_start(void); static HDR_ATTR void (*_entry_point)(void) = &__appcpu_start; extern void z_prep_c(void); static void core_intr_matrix_clear(void) { uint32_t core_id = esp_cpu_get_core_id(); for (int i = 0; i < ETS_MAX_INTR_SOURCE; i++) { intr_matrix_set(core_id, i, ETS_INVALID_INUM); } } /* * This is written in C rather than assembly since, during the port bring up, * Zephyr is being booted by the Espressif bootloader. With it, the C stack * is already set up. */ void IRAM_ATTR __appcpu_start(void) { extern uint32_t _init_start; /* Move the exception vector table to IRAM. */ __asm__ __volatile__ ( "wsr %0, vecbase" : : "r"(&_init_start)); /* Zero out BSS. Clobber _bss_start to avoid memset() elision. */ z_bss_zero(); __asm__ __volatile__ ( "" : : "g"(&__bss_start) : "memory"); /* Disable normal interrupts. */ __asm__ __volatile__ ( "wsr %0, PS" : : "r"(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE)); /* Initialize the architecture CPU pointer. Some of the * initialization code wants a valid arch_current_thread() before * z_prep_c() is invoked. */ __asm__ __volatile__("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[1])); core_intr_matrix_clear(); esp_intr_initialize(); /* Start Zephyr */ z_prep_c(); CODE_UNREACHABLE; } /* Boot-time static default printk handler, possibly to be overridden later. */ int IRAM_ATTR arch_printk_char_out(int c) { ARG_UNUSED(c); return 0; } void sys_arch_reboot(int type) { esp_restart_noos(); }