/*
 * Copyright (c) 2024, Ambiq Micro Inc. <www.ambiq.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/ {
	aliases {
		psram0 = &aps6404l;
	};
};

&gpio64_95 {
	status = "okay";
};

&gpio32_63 {
	status = "okay";
};

&mspi1 {

	pinctrl-0 = <&mspi1_default>;
	pinctrl-1 = <&mspi1_sleep>;
	pinctrl-2 = <&mspi1_psram>;
	pinctrl-names = "default","sleep","psram";
	status = "okay";

	ce-gpios = <&gpio64_95 5 GPIO_ACTIVE_LOW>,
		   <&gpio32_63 18 GPIO_ACTIVE_LOW>;

	cmdq-buffer-location = ".mspi_buff";
	cmdq-buffer-size = <256>;

	aps6404l: aps6404l@0 {
		compatible = "ambiq,mspi-device", "mspi-aps6404l";
		size = <DT_SIZE_M(64)>;
		reg = <0>;
		status = "okay";
		mspi-max-frequency = <48000000>;
		mspi-io-mode = "MSPI_IO_MODE_QUAD";
		mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
		mspi-hardware-ce-num = <0>;
		read-command = <0xEB>;
		write-command = <0x38>;
		command-length = "INSTR_1_BYTE";
		address-length = "ADDR_3_BYTE";
		rx-dummy = <6>;
		tx-dummy = <0>;
		xip-config = <1 0 0 0>;
		ce-break-config = <1024 3>;
		ambiq,timing-config-mask = <3>;
		ambiq,timing-config = <0 6 0 0 0 0 0 0>;
	};

};

&pinctrl {

	mspi1_sleep: mspi1_sleep{

		group1 {
			pinmux = <GPIO_P51>,
				 <GPIO_P52>,
				 <GPIO_P53>,
				 <GPIO_P54>,
				 <GPIO_P55>,
				 <GPIO_P56>,
				 <GPIO_P57>,
				 <GPIO_P58>,
				 <GPIO_P59>,
				 <GPIO_P69>,
				 <GPIO_P50>;
		};

	};

	mspi1_psram: mspi1_psram{

		group1 {
			pinmux = <MSPI1_0_P51>,
				 <MSPI1_1_P52>,
				 <MSPI1_2_P53>,
				 <MSPI1_3_P54>,
				 <MSPI1_4_P55>,
				 <MSPI1_5_P56>,
				 <MSPI1_6_P57>,
				 <MSPI1_7_P58>;
			drive-strength = "0.75";
			ambiq,iom-mspi = <0>;
			ambiq,iom-num = <1>;
		};

		group2 {
			pinmux = <MSPI1_8_P59>;
			drive-strength = "0.75";
			ambiq,iom-mspi = <0>;
			ambiq,iom-num = <2>;
		};

		group3 {
			pinmux = <NCE69_P69>;
			drive-strength = "1.0";
			ambiq,iom-mspi = <0>;
			ambiq,iom-num = <1>;
		};

		group4 {
			pinmux = <GPIO_P50>;
		};
	};
};