/*
 * Copyright (c) 2023 IoT.bzh
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RENESAS_CLOCK_R8A779F0_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RENESAS_CLOCK_R8A779F0_H_

#include "renesas_cpg_mssr.h"

/* r8a779f0 CPG Core Clocks */
#define R8A779F0_CLK_Z0			0
#define R8A779F0_CLK_Z1			1
#define R8A779F0_CLK_ZR			2
#define R8A779F0_CLK_ZX			3
#define R8A779F0_CLK_ZS			4
#define R8A779F0_CLK_ZT			5
#define R8A779F0_CLK_ZTR		6
#define R8A779F0_CLK_S0D2		7
#define R8A779F0_CLK_S0D3		8
#define R8A779F0_CLK_S0D4		9
#define R8A779F0_CLK_S0D2_MM		10
#define R8A779F0_CLK_S0D3_MM		11
#define R8A779F0_CLK_S0D4_MM		12
#define R8A779F0_CLK_S0D2_RT		13
#define R8A779F0_CLK_S0D3_RT		14
#define R8A779F0_CLK_S0D4_RT		15
#define R8A779F0_CLK_S0D6_RT		16
#define R8A779F0_CLK_S0D3_PER		17
#define R8A779F0_CLK_S0D6_PER		18
#define R8A779F0_CLK_S0D12_PER		19
#define R8A779F0_CLK_S0D24_PER		20
#define R8A779F0_CLK_S0D2_HSC		21
#define R8A779F0_CLK_S0D3_HSC		22
#define R8A779F0_CLK_S0D4_HSC		23
#define R8A779F0_CLK_S0D6_HSC		24
#define R8A779F0_CLK_S0D12_HSC		25
#define R8A779F0_CLK_S0D2_CC		26
#define R8A779F0_CLK_CL			27
#define R8A779F0_CLK_CL16M		28
#define R8A779F0_CLK_CL16M_MM		29
#define R8A779F0_CLK_CL16M_RT		30
#define R8A779F0_CLK_CL16M_PER		31
#define R8A779F0_CLK_CL16M_HSC		32
#define R8A779F0_CLK_ZB3		33
#define R8A779F0_CLK_ZB3D2		34
#define R8A779F0_CLK_ZB3D4		35
#define R8A779F0_CLK_SD0H		36
#define R8A779F0_CLK_SD0		37
#define R8A779F0_CLK_RPC		38
#define R8A779F0_CLK_RPCD2		39
#define R8A779F0_CLK_MSO		40
#define R8A779F0_CLK_POST		41
#define R8A779F0_CLK_POST2		42
#define R8A779F0_CLK_SASYNCRT		43
#define R8A779F0_CLK_SASYNCPERD1	44
#define R8A779F0_CLK_SASYNCPERD2	45
#define R8A779F0_CLK_SASYNCPERD4	46
#define R8A779F0_CLK_DBGSOC_HSC		47
#define R8A779F0_CLK_RSW2		48
#define R8A779F0_CLK_CPEX		49
#define R8A779F0_CLK_CBFUSA		50
#define R8A779F0_CLK_R			51
#define R8A779F0_CLK_OSC		52

#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RENESAS_CLOCK_R8A779F0_H_ */