/*
 * SPDX-License-Identifier: Apache-2.0
 * Copyright 2022 NXP
 */

#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NXP_GAU_ADC_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NXP_GAU_ADC_H_

#include <zephyr/dt-bindings/adc/adc.h>

/* Channel Sources */
#define GAU_ADC_CH0 0
#define GAU_ADC_CH1 1
#define GAU_ADC_CH2 2
#define GAU_ADC_CH3 3
#define GAU_ADC_CH4 4
#define GAU_ADC_CH5 5
#define GAU_ADC_CH6 6
#define GAU_ADC_CH7 7
#define GAU_ADC_VBATS 8
#define GAU_ADC_VREF 9
#define GAU_ADC_DACA 10
#define GAU_ADC_DACB 11
#define GAU_ADC_VSSA 12
#define GAU_ADC_TEMPP 15

#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NXP_GAU_ADC_H_ */