/*
 * Copyright (c) 2024 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include "nrf54l_05_10_15.dtsi"

&cpuapp_sram {
	reg = <0x20000000 DT_SIZE_K(188)>;
	ranges = <0x0 0x20000000 DT_SIZE_K(188)>;
};

/* 188 + 68 = 256KB */
/ {
	soc {
		cpuflpr_sram: memory@2002f000 {
			compatible = "mmio-sram";
			reg = <0x2002f000 DT_SIZE_K(68)>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x2002f000 DT_SIZE_K(68)>;
		};
	};
};

&cpuapp_rram {
	reg = <0x0 DT_SIZE_K(1428)>;
};

/* 1428 + 96 = 1524KB */
&rram_controller {
	cpuflpr_rram: rram@165000 {
		compatible = "soc-nv-flash";
		reg = <0x165000 DT_SIZE_K(96)>;
		erase-block-size = <4096>;
		write-block-size = <16>;
	};
};