/*
 * Copyright (c) 2024 Renesas Electronics Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
#include <freq.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m4";
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <1>;

			mpu: mpu@e000ed90 {
				compatible = "arm,armv7m-mpu";
				reg = <0xe000ed90 0x40>;
			};

		};
	};

	soc {
		system: system@4001e000 {
			compatible = "renesas,ra-system";
			reg = <0x4001e000 0x1000>;
			status = "okay";
		};

		flash-controller@407e0000 {
			reg = <0x407e0000 0x10000>;
			#address-cells = <1>;
			#size-cells = <1>;
		};

		ioport0: gpio@40040000 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x40040000 0x20>;
			port = <0>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport1: gpio@40040020 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x40040020 0x20>;
			port = <1>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport2: gpio@40040040 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x40040040 0x20>;
			port = <2>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport3: gpio@40040060 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x40040060 0x20>;
			port = <3>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport4: gpio@40040080 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x40040080 0x20>;
			port = <4>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport5: gpio@400400a0 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x400400a0 0x20>;
			port = <5>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport9: gpio@40040120 {
			compatible = "renesas,ra-gpio-ioport";
			reg = <0x40040120 0x20>;
			port = <9>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			status = "disabled";
		};

		pinctrl: pin-controller@40040800 {
			compatible = "renesas,ra-pinctrl-pfs";
			reg = <0x40040800 0x3c0>;
			status = "okay";
		};

		sci0: sci0@40070000  {
			compatible = "renesas,ra-sci";
			interrupts = <0 1>, <1 1>, <2 1>, <3 1>;
			interrupt-names = "rxi", "txi", "tei", "eri";
			reg = <0x40070000 0x20>;
			clocks = <&pclka MSTPB 31>;
			status = "disabled";
			uart {
				compatible = "renesas,ra-sci-uart";
				channel = <0>;
				status = "disabled";
			};
		};

		sci1: sci1@40070020  {
			compatible = "renesas,ra-sci";
			interrupts = <4 1>, <5 1>, <6 1>, <7 1>;
			interrupt-names = "rxi", "txi", "tei", "eri";
			reg = <0x40070020 0x20>;
			clocks = <&pclka MSTPB 30>;
			status = "disabled";
			uart {
				compatible = "renesas,ra-sci-uart";
				channel = <1>;
				status = "disabled";
			};
		};

		sci9: sci9@40070120  {
			compatible = "renesas,ra-sci";
			interrupts = <36 1>, <37 1>, <38 1>, <39 1>;
			interrupt-names = "rxi", "txi", "tei", "eri";
			reg = <0x40070120 0x20>;
			clocks = <&pclka MSTPB 22>;
			status = "disabled";
			uart {
				compatible = "renesas,ra-sci-uart";
				channel = <9>;
				status = "disabled";
			};
		};

		spi0: spi@40072000 {
			compatible = "renesas,ra-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			channel = <0>;
			reg = <0x40072000 0x100>;
			status = "disabled";
		};

		spi1: spi@40072100 {
			compatible = "renesas,ra-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			channel = <1>;
			interrupts = <32 1>, <33 1>, <34 1>, <35 1>;
			interrupt-names = "rxi", "txi", "tei", "eri";
			reg = <0x40072100 0x100>;
			status = "disabled";
		};

		agt0: agt@40084000  {
			compatible = "renesas,ra-agt";
			channel = <0>;
			reg = <0x40084000 0x100>;
			renesas,count-source = "AGT_CLOCK_LOCO";
			renesas,prescaler = <0>;
			renesas,resolution = <16>;
			status = "disabled";

			counter {
				compatible = "renesas,ra-agt-counter";
				status = "disabled";
			};
		};

		agt1: agt@40084100 {
			compatible = "renesas,ra-agt";
			channel = <1>;
			reg = <0x40084100 0x100>;
			renesas,count-source = "AGT_CLOCK_LOCO";
			renesas,prescaler = <0>;
			renesas,resolution = <16>;
			status = "disabled";

			counter {
				compatible = "renesas,ra-agt-counter";
				status = "disabled";
			};
		};

		adc0: adc@4005c000 {
			compatible = "renesas,ra-adc";
			interrupt-names = "scanend";
			reg = <0x4005c000 0x100>;
			#io-channel-cells = <1>;
			vref-mv = <3300>;
			status = "disabled";
		};

		adc1: adc@4005c200 {
			compatible = "renesas,ra-adc";
			interrupt-names = "scanend";
			reg = <0x4005c200 0x100>;
			#io-channel-cells = <1>;
			vref-mv = <3300>;
			status = "disabled";
		};

		iic0: iic0@40053000 {
			compatible = "renesas,ra-iic";
			channel = <0>;
			reg = <0x40053000 0x100>;
			status = "disabled";
		};

		iic1: iic1@40053100 {
			compatible = "renesas,ra-iic";
			channel = <1>;
			reg = <0x40053100 0x100>;
			status = "disabled";
		};

		id_code: id_code@1010018 {
			compatible = "zephyr,memory-region";
			reg = <0x01010018 0x20>;
			zephyr,memory-region = "ID_CODE";
			status = "okay";
		};

		port_irq0: external-interrupt@40006000 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006000 0x1>;
			channel = <0>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq1: external-interrupt@40006001 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006001 0x1>;
			channel = <1>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq2: external-interrupt@40006002 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006002 0x1>;
			channel = <2>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq3: external-interrupt@40006003 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006003 0x1>;
			channel = <3>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq4: external-interrupt@40006004 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006004 0x1>;
			channel = <4>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq6: external-interrupt@40006006 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006006 0x1>;
			channel = <6>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq7: external-interrupt@40006007 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006007 0x1>;
			channel = <7>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq9: external-interrupt@40006009 {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x40006009 0x1>;
			channel = <9>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq11: external-interrupt@4000600b {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x4000600b 0x1>;
			channel = <11>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq14: external-interrupt@4000600e {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x4000600e 0x1>;
			channel = <14>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		port_irq15: external-interrupt@4000600f {
			compatible = "renesas,ra-external-interrupt";
			reg = <0x4000600f 0x1>;
			channel = <15>;
			renesas,sample-clock-div = <64>;
			#port-irq-cells = <0>;
			status = "disabled";
		};

		pwm0: pwm0@40169000 {
			compatible = "renesas,ra-pwm";
			divider = <RA_PWM_SOURCE_DIV_1>;
			channel = <RA_PWM_CHANNEL_0>;
			clocks = <&pclkd MSTPD 5>;
			reg = <0x40169000 0x100>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm1: pwm1@40169100 {
			compatible = "renesas,ra-pwm";
			divider = <RA_PWM_SOURCE_DIV_1>;
			channel = <RA_PWM_CHANNEL_1>;
			clocks = <&pclkd MSTPD 5>;
			reg = <0x40169100 0x100>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm2: pwm2@40169200 {
			compatible = "renesas,ra-pwm";
			divider = <RA_PWM_SOURCE_DIV_1>;
			channel = <RA_PWM_CHANNEL_2>;
			clocks = <&pclkd MSTPD 5>;
			reg = <0x40169200 0x100>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm3: pwm3@40169300 {
			compatible = "renesas,ra-pwm";
			divider = <RA_PWM_SOURCE_DIV_1>;
			channel = <RA_PWM_CHANNEL_3>;
			clocks = <&pclkd MSTPD 5>;
			reg = <0x40169300 0x100>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm4: pwm4@40169400 {
			compatible = "renesas,ra-pwm";
			divider = <RA_PWM_SOURCE_DIV_1>;
			channel = <RA_PWM_CHANNEL_4>;
			clocks = <&pclkd MSTPD 5>;
			reg = <0x40169400 0x100>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm5: pwm5@40169500 {
			compatible = "renesas,ra-pwm";
			divider = <RA_PWM_SOURCE_DIV_1>;
			channel = <RA_PWM_CHANNEL_5>;
			clocks = <&pclkd MSTPD 6>;
			reg = <0x40169500 0x100>;
			#pwm-cells = <3>;
			status = "disabled";
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};