/** * Copyright (c) 2024 MUNIC SA * Copyright (c) 2024-2025 Renesas Electronics Corporation * * Renesas R7FA2AL1AxxxFP MCU device tree for 100 pins socket * * SPDX-License-Identifier: Apache-2.0 * */ / { clocks: clocks { #address-cells = <1>; #size-cells = <1>; xtal: clock-main-osc { compatible = "renesas,ra-cgc-external-clock"; clock-frequency = ; #clock-cells = <0>; status = "disabled"; }; hoco: clock-hoco { compatible = "fixed-clock"; clock-frequency = ; #clock-cells = <0>; }; moco: clock-moco { compatible = "fixed-clock"; clock-frequency = ; #clock-cells = <0>; }; loco: clock-loco { compatible = "fixed-clock"; clock-frequency = <32768>; #clock-cells = <0>; }; subclk: clock-subclk { compatible = "renesas,ra-cgc-subclk"; clock-frequency = <32768>; #clock-cells = <0>; status = "disabled"; }; pclkblock: pclkblock@4001e01c { compatible = "renesas,ra-cgc-pclk-block"; reg = <0x4001e01c 4>, <0x40047000 4>, <0x40047004 4>, <0x40047008 4>; reg-names = "MSTPA", "MSTPB","MSTPC", "MSTPD"; #clock-cells = <0>; clocks = <&hoco>; status = "okay"; iclk: iclk { compatible = "renesas,ra-cgc-pclk"; clock-frequency = <48000000>; div = <1>; #clock-cells = <2>; status = "okay"; }; pclkb: pclkb { compatible = "renesas,ra-cgc-pclk"; div = <2>; #clock-cells = <2>; status = "okay"; }; pclkd: pclkd { compatible = "renesas,ra-cgc-pclk"; div = <1>; #clock-cells = <2>; status = "okay"; }; clkout: clkout { compatible = "renesas,ra-cgc-pclk"; #clock-cells = <2>; status = "disabled"; }; }; }; };