/*
 * Copyright 2024 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <arm/armv8-m.dtsi>
#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/i2c/i2c.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-m33f";
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};

	/* Dummy pinctrl node, filled with pin mux options at board level */
	pinctrl: pinctrl {
		compatible = "nxp,port-pinctrl";
		status = "okay";
	};

	soc {
		syscon: syscon@40000000 {
			compatible = "nxp,lpc-syscon";
			reg = <0x40000000 0x4000>;
			#clock-cells = <1>;
			reset: reset {
				compatible = "nxp,lpc-syscon-reset";
				#reset-cells = <1>;
			};
		};

		sramx: memory@4000000 {
			compatible = "mmio-sram";
			reg = <0x4000000 DT_SIZE_K(8)>;
		};

		sram0: memory@20000000 {
			compatible = "mmio-sram";
			reg = <0x20000000 DT_SIZE_K(120)>;
		};

		porta: pinmux@400bc000 {
			compatible = "nxp,port-pinmux";
			reg = <0x400bc000 0x1000>;
			clocks = <&syscon MCUX_PORT0_CLK>;
		};

		portb: pinmux@400bd000 {
			compatible = "nxp,port-pinmux";
			reg = <0x400bd000 0x1000>;
			clocks = <&syscon MCUX_PORT1_CLK>;
		};

		portc: pinmux@400be000 {
			compatible = "nxp,port-pinmux";
			reg = <0x400be000 0x1000>;
			clocks = <&syscon MCUX_PORT2_CLK>;
		};

		portd: pinmux@400bf000 {
			compatible = "nxp,port-pinmux";
			reg = <0x400bf000 0x1000>;
			clocks = <&syscon MCUX_PORT3_CLK>;
		};

		porte: pinmux@400c0000 {
			compatible = "nxp,port-pinmux";
			reg = <0x400c0000 0x1000>;
			clocks = <&syscon MCUX_PORT4_CLK>;
		};

		gpio0: gpio@40102000 {
			compatible = "nxp,kinetis-gpio";
			reg = <0x40102000 0x1000>;
			interrupts = <71 0>;
			gpio-controller;
			#gpio-cells = <2>;
			nxp,kinetis-port = <&porta>;
		};

		gpio1: gpio@40103000 {
			compatible = "nxp,kinetis-gpio";
			status = "disabled";
			reg = <0x40103000 0x1000>;
			interrupts = <72 0>;
			gpio-controller;
			#gpio-cells = <2>;
			nxp,kinetis-port = <&portb>;
		};

		gpio2: gpio@40104000 {
			compatible = "nxp,kinetis-gpio";
			status = "disabled";
			reg = <0x40104000 0x1000>;
			interrupts = <73 0>;
			gpio-controller;
			#gpio-cells = <2>;
			nxp,kinetis-port = <&portc>;
		};

		gpio3: gpio@40105000 {
			compatible = "nxp,kinetis-gpio";
			status = "disabled";
			reg = <0x40105000 0x1000>;
			interrupts = <74 0>;
			gpio-controller;
			#gpio-cells = <2>;
			nxp,kinetis-port = <&portd>;
		};

		gpio4: gpio@40106000 {
			compatible = "nxp,kinetis-gpio";
			status = "disabled";
			reg = <0x40106000 0x1000>;
			interrupts = <75 0>;
			gpio-controller;
			#gpio-cells = <2>;
			nxp,kinetis-port = <&porte>;
		};

		lpuart0: lpuart@4009f000 {
			compatible = "nxp,lpuart";
			reg = <0x4009f000 0x1000>;
			interrupts = <31 0>;
			clocks = <&syscon MCUX_LPUART0_CLK>;
		};

		fmu: flash-controller@40095000 {
			compatible = "nxp,msf1";
			reg = <0x40095000 0x1000>;
			interrupts = <12 0>;

			#address-cells = <1>;
			#size-cells = <1>;

			flash: flash@0 {
				compatible = "soc-nv-flash";
				reg = <0 DT_SIZE_M(1)>;
				erase-block-size = <8192>;
				write-block-size = <128>;
			};
		};

		ctimer0: ctimer@40004000 {
			compatible = "nxp,lpc-ctimer";
			reg = <0x40004000 0x1000>;
			interrupts = <39 0>;
			status = "disabled";
			clk-source = <1>;
			clocks = <&syscon MCUX_CTIMER0_CLK>;
			mode = <0>;
			input = <0>;
			prescale = <0>;
		};

		ctimer1: ctimer@40005000 {
			compatible = "nxp,lpc-ctimer";
			reg = <0x40005000 0x1000>;
			interrupts = <40 0>;
			status = "disabled";
			clk-source = <1>;
			clocks = <&syscon MCUX_CTIMER1_CLK>;
			mode = <0>;
			input = <0>;
			prescale = <0>;
		};

		ctimer2: ctimer@40006000 {
			compatible = "nxp,lpc-ctimer";
			reg = <0x40006000 0x1000>;
			interrupts = <41 0>;
			status = "disabled";
			clk-source = <1>;
			clocks = <&syscon MCUX_CTIMER2_CLK>;
			mode = <0>;
			input = <0>;
			prescale = <0>;
		};

		ctimer3: ctimer@40007000 {
			compatible = "nxp,lpc-ctimer";
			reg = <0x40007000 0x1000>;
			interrupts = <42 0>;
			status = "disabled";
			clk-source = <1>;
			clocks = <&syscon MCUX_CTIMER3_CLK>;
			mode = <0>;
			input = <0>;
			prescale = <0>;
		};

		ctimer4: ctimer@40008000 {
			compatible = "nxp,lpc-ctimer";
			reg = <0x40008000 0x1000>;
			interrupts = <43 0>;
			status = "disabled";
			clk-source = <1>;
			clocks = <&syscon MCUX_CTIMER4_CLK>;
			mode = <0>;
			input = <0>;
			prescale = <0>;
		};

		dac0: dac@400b4000 {
			compatible = "nxp,lpdac";
			reg = <0x400b4000 0x1000>;
			interrupts = <67 0>;
			status = "disabled";
			voltage-reference = <0>;
			#io-channel-cells = <1>;
		};

		flexpwm0: flexpwm@400a9000 {
			compatible = "nxp,flexpwm";
			reg = <0x400a9000 0x1000>;
			interrupt-names = "RELOAD-ERROR", "FAULT";
			interrupts = <44 0>, <45 0>;
			flexpwm0_pwm0: pwm0 {
				compatible = "nxp,imx-pwm";
				index = <0>;
				interrupts = <46 0>;
				#pwm-cells = <3>;
				clocks = <&syscon MCUX_BUS_CLK>;
				nxp,prescaler = <128>;
				status = "disabled";
				run-in-wait;
			};

			flexpwm0_pwm1: pwm1 {
				compatible = "nxp,imx-pwm";
				index = <1>;
				interrupts = <47 0>;
				#pwm-cells = <3>;
				clocks = <&syscon MCUX_BUS_CLK>;
				nxp,prescaler = <128>;
				status = "disabled";
				run-in-wait;
			};

			flexpwm0_pwm2: pwm2 {
				compatible = "nxp,imx-pwm";
				index = <2>;
				interrupts = <48 0>;
				#pwm-cells = <3>;
				clocks = <&syscon MCUX_BUS_CLK>;
				nxp,prescaler = <128>;
				status = "disabled";
				run-in-wait;
			};
		};

		flexpwm1: flexpwm@d0000 {
			compatible = "nxp,flexpwm";
			reg = <0xd0000 0x1000>;
			interrupt-names = "RELOAD-ERROR", "FAULT";
			interrupts = <79 0>, <80 0>;
			flexpwm1_pwm0: pwm0 {
				compatible = "nxp,imx-pwm";
				index = <0>;
				interrupts = <81 0>;
				#pwm-cells = <3>;
				clocks = <&syscon MCUX_BUS_CLK>;
				nxp,prescaler = <128>;
				status = "disabled";
				run-in-wait;
			};

			flexpwm1_pwm1: pwm1 {
				compatible = "nxp,imx-pwm";
				index = <1>;
				interrupts = <82 0>;
				#pwm-cells = <3>;
				clocks = <&syscon MCUX_BUS_CLK>;
				nxp,prescaler = <128>;
				status = "disabled";
				run-in-wait;
			};

			flexpwm1_pwm2: pwm2 {
				compatible = "nxp,imx-pwm";
				index = <2>;
				interrupts = <83 0>;
				#pwm-cells = <3>;
				clocks = <&syscon MCUX_BUS_CLK>;
				nxp,prescaler = <128>;
				status = "disabled";
				run-in-wait;
			};
		};

		lpadc0: lpadc@400af000 {
			compatible = "nxp,lpc-lpadc";
			reg = <0x400af000 0x1000>;
			interrupts = <62 0>;
			status = "disabled";
			clk-divider = <1>;
			clk-source = <0>;
			voltage-ref= <2>;
			calibration-average = <128>;
			power-level = <0>;
			offset-value-a = <0>;
			offset-value-b = <0>;
			#io-channel-cells = <1>;
			clocks = <&syscon MCUX_LPADC1_CLK>;
		};

		lpadc1: lpadc@400b0000 {
			compatible = "nxp,lpc-lpadc";
			reg = <0x400b0000 0x1000>;
			interrupts = <63 0>;
			status = "disabled";
			clk-divider = <1>;
			clk-source = <0>;
			voltage-ref= <2>;
			calibration-average = <128>;
			power-level = <1>;
			offset-value-a = <0>;
			offset-value-b = <0>;
			#io-channel-cells = <1>;
			clocks = <&syscon MCUX_LPADC2_CLK>;
		};

		lpcmp0: lpcmp@400b1000 {
			compatible = "nxp,lpcmp";
			reg = <0x400b1000 0x1000>;
			interrupts = <64 0>;
			status = "disabled";
			#io-channel-cells = <2>;
		};

		lpcmp1: lpcmp@400b2000 {
			compatible = "nxp,lpcmp";
			reg = <0x400b2000 0x1000>;
			interrupts = <65 0>;
			status = "disabled";
			#io-channel-cells = <2>;
		};

		lpi2c0: i2c@4009a000 {
			compatible = "nxp,lpi2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4009a000 0x1000>;
			interrupts = <26 0>;
			clocks = <&syscon MCUX_LPI2C0_CLK>;
			status = "disabled";
		};

		lpi2c1: i2c@4009b000 {
			compatible = "nxp,lpi2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4009b000 0x1000>;
			interrupts = <27 0>;
			clocks = <&syscon MCUX_LPI2C1_CLK>;
			status = "disabled";
		};

		lpi2c2: i2c@400d4000 {
			compatible = "nxp,lpi2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x400d4000 0x1000>;
			interrupts = <77 0>;
			clocks = <&syscon MCUX_LPI2C2_CLK>;
			status = "disabled";
		};

		lpi2c3: i2c@400d5000 {
			compatible = "nxp,lpi2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x400d5000 0x1000>;
			interrupts = <78 0>;
			clocks = <&syscon MCUX_LPI2C3_CLK>;
			status = "disabled";
		};

		lptmr0: lptmr@400ab000 {
			compatible = "nxp,lptmr";
			reg = <0x400ab000 0x1000>;
			interrupts = <55 0>;
			clock-frequency = <16000>;
			prescaler = <1>;
			clk-source = <1>;
			resolution = <32>;
			status = "disabled";
		};

		usb: usbd@400a4000 {
			compatible = "nxp,kinetis-usbd";
			reg = <0x400a4000 0x1000>;
			interrupts = <36 1>;
			interrupt-names = "usb";
			num-bidir-endpoints = <16>;
			status = "disabled";
			no-voltage-regulator;
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <3>;
};