/*
 * Copyright (c) 2024 Felipe Neves
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <st/h7/stm32h753Xi.dtsi>
#include <st/h7/stm32h753bitx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	model = "Witte Technology STM32H753ZI Linum board";
	compatible = "witte,linum";

	chosen {
		zephyr,console = &usart1;
		zephyr,shell-uart = &usart1;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,dtcm = &dtcm;
		zephyr,code-partition = &slot0_partition;
		zephyr,canbus = &fdcan1;
	};

	sdram1: sdram@c0000000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		device_type = "memory";
		reg = <0xc0000000 DT_SIZE_M(8)>;
		zephyr,memory-region = "SDRAM1";
		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
	};

	leds: leds {
		compatible = "gpio-leds";
		green_led: led_0 {
			gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
			label = "User LD1";
		};
		red_led: led_1 {
			gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
			label = "User LD2";
		};
		blue_led: led_2 {
			gpios = <&gpiog 3 GPIO_ACTIVE_LOW>;
			label = "User LD3";
		};

	};

	aliases {
		led0 = &green_led;
		led1 = &blue_led;
	};
};

&gpiod {
	status = "okay";

	/* power the SD card */
	mcu-sel-gpios {
		gpio-hog;
		gpios = <7 GPIO_ACTIVE_HIGH>;
		output-high;
	};
};

&gpioi {
	status = "okay";
	/* power the ETH PHY , and FDCAN1 XVCR*/
	mcu-sel-gpios {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>,
				<4 GPIO_ACTIVE_HIGH>;

		output-high;
	};
};

&gpioe {
	status = "okay";

	/* power FDCAN2 XVCR*/
	mcu-sel-gpios {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>,
				<4 GPIO_ACTIVE_HIGH>;

		output-high;
	};
};

&clk_lsi {
	status = "okay";
};

&clk_hsi48 {
	status = "okay";
};

&clk_hse {
	/delete-property/ hse-bypass;
	clock-frequency = <DT_FREQ_M(25)>;
	status = "okay";
};

&pll {
	div-m = <5>;
	mul-n = <192>;
	div-p = <2>;
	div-q = <4>;
	div-r = <4>;
	clocks = <&clk_hse>;
	status = "okay";
};

&pll2 {
	div-m = <2>;
	mul-n = <48>;
	div-p = <8>;
	div-q = <40>;
	div-r = <3>;
	clocks = <&clk_hse>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(480)>;
	d1cpre = <1>;
	hpre = <2>;
	d1ppre = <2>;
	d2ppre1 = <2>;
	d2ppre2 = <2>;
	d3ppre = <2>;
};

&usart1 {
	pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pb15>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&usart2 {
	pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&usart3 {
	pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&uart4 {
	pinctrl-0 = <&uart4_tx_pb9 &uart4_rx_pb8>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&usart6 {
	pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

zephyr_udc0: &usbotg_fs {
	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
	pinctrl-names = "default";
	status = "okay";
};

&rtc {
	clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
	status = "okay";
};

&i2c3 {
	pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&timers12 {
	st,prescaler = <10000>;
	status = "okay";

	pwm12: pwm {
		status = "okay";
		pinctrl-0 = <&tim12_ch1_pb14>;
		pinctrl-names = "default";
	};
};

&adc1 {
	pinctrl-0 = <&adc1_inp15_pa3>;
	pinctrl-names = "default";
	st,adc-clock-source = "SYNC";
	st,adc-prescaler = <4>;
	status = "okay";
};

&rng {
	status = "okay";
};

&fdcan1 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
		 <&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
	pinctrl-0 = <&fdcan1_tx_ph13 &fdcan1_rx_ph14>;
	pinctrl-names = "default";
	status = "okay";
};

&fdcan2 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
		 <&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
	pinctrl-0 = <&fdcan2_rx_pb12 &fdcan2_tx_pb13>;
	pinctrl-names = "default";
	status = "okay";
};

&mac {
	status = "okay";
	pinctrl-0 = <&eth_rxd0_pc4
		     &eth_rxd1_pc5
		     &eth_ref_clk_pa1
		     &eth_crs_dv_pa7
		     &eth_tx_en_pg11
		     &eth_txd0_pg13
		     &eth_txd1_pg14>;
	pinctrl-names = "default";
};

&mdio {
	status = "okay";
	pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
	pinctrl-names = "default";

	ethernet-phy@0 {
		compatible = "microchip,ksz8081";
		reg = <0x00>;
		status = "okay";
		microchip,interface-type = "rmii-25MHz";
	};
};

&spi1 {
	status = "okay";
	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
	pinctrl-names = "default";
	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};

&fmc {
	pinctrl-0 = <&fmc_nbl0_pe0
		&fmc_nbl1_pe1 &fmc_sdclk_pg8 &fmc_sdnwe_pc0 &fmc_sdcke0_pc3_c
		&fmc_sdne0_pc2_c &fmc_sdnras_pf11 &fmc_sdncas_pg15
		&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
		&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
		&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
		&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
		&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
		&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
		&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
		&fmc_d15_pd10>;
	pinctrl-names = "default";
	status = "okay";

	sdram {
		status = "okay";
		power-up-delay = <100>;
		num-auto-refresh = <8>;
		mode-register = <0x220>;
		refresh-rate = <0x603>;
		bank@1 {
			reg = <1>;
			st,sdram-control = <STM32_FMC_SDRAM_NC_8
				STM32_FMC_SDRAM_NR_12
				STM32_FMC_SDRAM_MWID_16
				STM32_FMC_SDRAM_NB_4
				STM32_FMC_SDRAM_CAS_3
				STM32_FMC_SDRAM_SDCLK_PERIOD_2
				STM32_FMC_SDRAM_RBURST_ENABLE
				STM32_FMC_SDRAM_RPIPE_0>;
			st,sdram-timing = <2 7 4 7 2 2 2>;
		};
	};
};

&ltdc {
		pinctrl-0 = <&ltdc_r0_pi15 &ltdc_r1_pj0 &ltdc_r2_pj1 &ltdc_r3_pj2
		&ltdc_r4_pj3 &ltdc_r5_pj4 &ltdc_r6_pj5 &ltdc_r7_pj6
		&ltdc_g0_pj7 &ltdc_g1_pj8 &ltdc_g2_pj9 &ltdc_g3_pj10
		&ltdc_g4_pj11 &ltdc_g5_pk0 &ltdc_g6_pk1 &ltdc_g7_pk2
		&ltdc_b0_pj12 &ltdc_b1_pj13 &ltdc_b2_pj14 &ltdc_b3_pj15
		&ltdc_b4_pk3 &ltdc_b5_pk4 &ltdc_b6_pk5 &ltdc_b7_pk6
		&ltdc_de_pk7 &ltdc_clk_pi14 &ltdc_hsync_pi10 &ltdc_vsync_pi9>;
	pinctrl-names = "default";

	disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>;

	ext-sdram = <&sdram1>;
	status = "okay";

	clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000008>,
		<&rcc STM32_SRC_PLL3_R NO_SEL>;

	width = <480>;
	height = <272>;
	pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
	display-timings {
		compatible = "zephyr,panel-timing";
		de-active = <1>;
		pixelclk-active = <0>;
		hsync-active = <0>;
		vsync-active = <0>;
		hsync-len = <1>;
		vsync-len = <10>;
		hback-porch = <43>;
		vback-porch = <12>;
		hfront-porch = <8>;
		vfront-porch = <4>;
	};
	def-back-color-red = <0xFF>;
	def-back-color-green = <0xFF>;
	def-back-color-blue = <0xFF>;
};

&sdmmc1 {
	pinctrl-0 = <&sdmmc1_d0_pc8
		     &sdmmc1_d1_pc9
		     &sdmmc1_d2_pc10
		     &sdmmc1_d3_pc11
		     &sdmmc1_ck_pc12
		     &sdmmc1_cmd_pd2>;
	pinctrl-names = "default";
	cd-gpios = <&gpiog 7 GPIO_ACTIVE_LOW>;
	status = "okay";

	disk {
		status = "okay";
	};
};

&flash0 {
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		/* 128KB for bootloader */
		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(128)>;
			read-only;
		};

		/* storage: 128KB for settings */
		storage_partition: partition@20000 {
			label = "storage";
			reg = <0x00020000 DT_SIZE_K(128)>;
		};

		/* application image slot: 256KB */
		slot0_partition: partition@40000 {
			label = "image-0";
			reg = <0x00040000 DT_SIZE_K(256)>;
		};

		/* backup slot: 256KB */
		slot1_partition: partition@80000 {
			label = "image-1";
			reg = <0x00080000 DT_SIZE_K(256)>;
		};

		/* swap slot: 128KB */
		scratch_partition: partition@c0000 {
			label = "image-scratch";
			reg = <0x000c0000 DT_SIZE_K(128)>;
		};

	};
};