/*
 * Copyright (c) 2021 Telink Semiconductor
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <freq.h>
#include <telink/telink_b91.dtsi>
#include "tlsr9518adk80d-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	model = "telink,b91";
	compatible = "telink,tlsr9518adk80d";

	aliases {
		led0 = &led_blue;
		led1 = &led_green;
		led2 = &led_white;
		led3 = &led_red;
		sw0 = &key_1;
		pwm-led0 = &pwm_led_blue;
		pwm-0 = &pwm0;
	};

	leds {
		compatible = "gpio-leds";

		led_blue: led_0 {
			gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
			label = "LED Blue";
		};

		led_green: led_1 {
			gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
			label = "LED Green";
		};

		led_white: led_2 {
			gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>;
			label = "LED White";
		};

		led_red: led_3 {
			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
			label = "LED Red";
		};
	};

	pwm_leds {
		compatible = "pwm-leds";

		pwm_led_blue: pwm_led_0 {
			pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
			label = "PWM LED Blue";
		};
	};

	keys {
		compatible = "gpio-keys";
		key_1: button_1 {
			label = "User KEY1";
			gpios = <&gpioc 2 GPIO_PULL_DOWN>;
			zephyr,code = <INPUT_KEY_0>;
		};
	};

	chosen {
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,sram = &ram_dlm;
		zephyr,flash = &flash;
		zephyr,flash-controller = &flash_mspi;
		zephyr,entropy = &trng0;
		zephyr,code-partition = &slot0_partition;
		zephyr,ieee802154 = &ieee802154;
	};
};

&cpu0 {
	clock-frequency = <48000000>;
};

&ram_ilm {
	reg = <0x00000000 0x00020000>;
};

&ram_dlm {
	reg = <0x00080000 0x00020000>;
};

&flash {
	reg = <0x20000000 0x100000>;

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 0x10000>;
		};
		slot0_partition: partition@10000 {
			label = "image-0";
			reg = <0x10000 0x70000>;
		};
		slot1_partition: partition@80000 {
			label = "image-1";
			reg = <0x80000 0x70000>;
		};
		scratch_partition: partition@f0000 {
			label = "image-scratch";
			reg = <0xf0000 0x4000>;
		};
		storage_partition: partition@f4000 {
			label = "storage";
			reg = <0xf4000 0x0000b000>;
		/* region <0xff000 0x1000> is reserved for Telink B91 SDK's data */
		};
	};
};

&gpiob {
	status = "okay";
};

&gpioc {
	interrupts = <25 1>;
	status = "okay";
};

&uart0 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&uart0_tx_pb2_default &uart0_rx_pb3_default>;
	pinctrl-names = "default";
};

&trng0 {
	status = "okay";
};

&ieee802154 {
	status = "okay";
};

&pwm0 {
	status = "okay";
	clock-frequency = <93750>;
	pinctrl-0 = <&pwm_ch0_pb4_default>;
	pinctrl-names = "default";
};

&pspi {
	status = "okay";
	cs0-pin = "PSPI_CSN_PC4";
	pinctrl-0 = <&pspi_clk_pc5_default &pspi_miso_pc6_default &pspi_mosi_pc7_default>;
	pinctrl-names = "default";
};

&hspi {
	status = "okay";
	cs0-pin = "HSPI_CSN_PA1";
	pinctrl-0 = <&hspi_clk_pa2_default &hspi_miso_pa3_default &hspi_mosi_pa4_default>;
	pinctrl-names = "default";
};

&i2c {
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
	pinctrl-0 = <&i2c_scl_pe1_default &i2c_sda_pe3_default>;
	pinctrl-names = "default";
};

&adc {
	status = "okay";
	vref-internal-mv = <1200>;
	sample-freq = <DT_FREQ_K(96)>;
};