/* * Copyright (c) 2020 Teslabs Engineering S.L. * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include #include #include "arduino_r3_connector.dtsi" #include / { model = "STMicroelectronics STM32H743ZI-NUCLEO board"; compatible = "st,stm32h743zi-nucleo"; chosen { zephyr,console = &usart3; zephyr,shell-uart = &usart3; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,dtcm = &dtcm; zephyr,code-partition = &slot0_partition; zephyr,canbus = &fdcan1; }; leds: leds { compatible = "gpio-leds"; green_led: led_0 { gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; label = "User LD1"; }; yellow_led: led_1 { gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>; label = "User LD2"; }; }; pwmleds { compatible = "pwm-leds"; red_pwm_led: red_pwm_led { pwms = <&pwm12 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; }; gpio_keys { compatible = "gpio-keys"; user_button: button_0 { label = "User"; gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; zephyr,code = ; }; }; aliases { led0 = &green_led; led1 = &yellow_led; pwm-led0 = &red_pwm_led; sw0 = &user_button; watchdog0 = &iwdg; die-temp0 = &die_temp; volt-sensor0 = &vref; volt-sensor1 = &vbat; }; }; &clk_lsi { status = "okay"; }; &clk_hsi48 { status = "okay"; }; &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ status = "okay"; }; &pll { div-m = <2>; mul-n = <240>; div-p = <2>; div-q = <2>; div-r = <2>; clocks = <&clk_hse>; status = "okay"; }; &pll2 { div-m = <4>; mul-n = <120>; div-p = <2>; div-q = <3>; /* gives 80MHz to the FDCAN */ div-r = <2>; clocks = <&clk_hse>; status = "okay"; }; &rcc { clocks = <&pll>; clock-frequency = ; d1cpre = <1>; hpre = <2>; d1ppre = <2>; d2ppre1 = <2>; d2ppre2 = <2>; d3ppre = <2>; }; &usart3 { pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>; pinctrl-names = "default"; current-speed = <115200>; status = "okay"; }; zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; status = "okay"; }; &rtc { clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>, <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; &i2c1 { pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; pinctrl-names = "default"; status = "okay"; clock-frequency = ; }; &timers12 { st,prescaler = <10000>; status = "okay"; pwm12: pwm { status = "okay"; pinctrl-0 = <&tim12_ch1_pb14>; pinctrl-names = "default"; }; }; &adc1 { pinctrl-0 = <&adc1_inp15_pa3>; pinctrl-names = "default"; st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; &die_temp { status = "okay"; }; &adc3 { pinctrl-0 = <&adc3_inp5_pf3>; pinctrl-names = "default"; st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; &dac1 { status = "okay"; pinctrl-0 = <&dac1_out1_pa4>; pinctrl-names = "default"; }; &rng { status = "okay"; }; &fdcan1 { pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>; pinctrl-names = "default"; clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>, <&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>; status = "okay"; }; /* * WARNING: * Possible pin conflicts: * The pins PA2 and PB13 may conflict on selection of ETH_STM32_HAL, * since they are used in ST Zio or ST morpho connectors. * To avoid conflicting states the jumpers JP6 and JP7 * must be in ON state. */ &mac { status = "okay"; pinctrl-0 = <ð_rxd0_pc4 ð_rxd1_pc5 ð_ref_clk_pa1 ð_crs_dv_pa7 ð_tx_en_pg11 ð_txd0_pg13 ð_txd1_pb13>; pinctrl-names = "default"; }; &mdio { status = "okay"; pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>; pinctrl-names = "default"; ethernet-phy@0 { compatible = "ethernet-phy"; reg = <0x00>; status = "okay"; }; }; &spi1 { status = "okay"; pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>; pinctrl-names = "default"; cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; &backup_sram { status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* 128KB for bootloader */ boot_partition: partition@0 { label = "mcuboot"; reg = <0x00000000 DT_SIZE_K(128)>; read-only; }; /* storage: 128KB for settings */ storage_partition: partition@20000 { label = "storage"; reg = <0x00020000 DT_SIZE_K(128)>; }; /* application image slot: 256KB */ slot0_partition: partition@40000 { label = "image-0"; reg = <0x00040000 DT_SIZE_K(256)>; }; /* backup slot: 256KB */ slot1_partition: partition@80000 { label = "image-1"; reg = <0x00080000 DT_SIZE_K(256)>; }; /* swap slot: 128KB */ scratch_partition: partition@c0000 { label = "image-scratch"; reg = <0x000c0000 DT_SIZE_K(128)>; }; }; }; &iwdg1 { status = "okay"; }; &vref { status = "okay"; }; &vbat { status = "okay"; };