/*
 * Copyright (c) 2024 Sean Nyekjaer <sean@geanix.com>
 *
 *  SPDX-License-Identifier: Apache-2.0
 */

#include <st/g0/stm32g0b1Xb.dtsi>
#include <st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi>

/ {
	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,canbus = &fdcan1;
	};

	aliases {
		led0 = &led_rx;
		led1 = &led_tx;
	};

	leds {
		compatible = "gpio-leds";
		led_rx: led_rx {
			gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
			label = "LED RX";
		};
		led_tx: led_tx {
			gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
			label = "LED TX";
		};
	};

	transceiver0: can-phy0 {
		compatible = "nxp,tja1051", "can-transceiver-gpio";
		enable-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
		max-bitrate = <5000000>;
		#phy-cells = <0>;
	};
};

&clk_hse {
	status = "okay";
	clock-frequency = <DT_FREQ_M(8)>;
};

&clk_hsi48 {
	status = "okay";
	crs-usb-sof;
};

&pll {
	div-m = <1>;
	mul-n = <30>;
	div-p = <2>;
	div-q = <3>;
	div-r = <4>;
	clocks = <&clk_hse>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(60)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <1>;
};

zephyr_udc0: &usb {
	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
	pinctrl-names = "default";
	status = "okay";
};

&fdcan1 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>,
		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
	pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
	pinctrl-names = "default";
	phys = <&transceiver0>;
	status = "okay";
};

&flash0 {
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(48)>;
			read-only;
		};
		slot0_partition: partition@c000 {
			label = "image-0";
			reg = <0x0000c000 DT_SIZE_K(80)>;
		};
	};
};