/*
 * Copyright 2022,2024 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <nxp/nxp_mimx93_a55.dtsi>
#include "imx93_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	model = "NXP i.MX93 A55";
	compatible = "fsl,mimx93";

	chosen {
		zephyr,console = &lpuart2;
		zephyr,shell-uart = &lpuart2;
		/* sram node actually locates at DDR DRAM */
		zephyr,sram = &dram;
		zephyr,canbus = &flexcan2;
	};

	cpus {
		cpu@0 {
			status = "disabled";
		};
	};

	dram: memory@d0000000 {
		reg = <0xd0000000 DT_SIZE_M(1)>;
	};

	aliases {
		led0 = &led_r;
		led1 = &led_g;
		sw0 = &btn_1;
	};

	leds {
		compatible = "gpio-leds";
		led_r: led_r {
			label = "LED_R";
			gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
		};
		led_g: led_g {
			label = "LED_G";
			gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
		};
		led_b: led_b {
			label = "LED_B";
			gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
		};
	};

	keys {
		compatible = "gpio-keys";

		btn_1: btn_1{
			label = "BTN1";
			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
			zephyr,code = <INPUT_KEY_0>;
		};

		btn_2: btn_2{
			label = "BTN2";
			gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
			zephyr,code = <INPUT_KEY_1>;
		};
	};

	board_exp_sel: board-exp-sel {
		/*
		 * Kconfig BOARD_MIMX93_EVK_A55_EXP_SEL_INIT must be
		 * enabled to configure it during init.
		 */
		compatible = "imx93evk-exp-sel";
		mux-gpios = <&gpio_exp0 4 GPIO_ACTIVE_HIGH>;
		mux = "A";
	};

	can_phy0: can-phy0 {
		compatible = "nxp,tja1057", "can-transceiver-gpio";
		standby-gpios = <&gpio_exp0 8 GPIO_ACTIVE_HIGH>;
		max-bitrate = <8000000>;
		#phy-cells = <0>;
		status = "okay";
	};
};

&enet {
	status = "okay";
};

&enet_mac {
	pinctrl-0 = <&pinmux_enet>;
	pinctrl-names = "default";
	phy-handle = <&phy>;
	zephyr,random-mac-address;
	phy-connection-type = "rgmii";
	status = "okay";
};

&enet_mdio {
	pinctrl-0 = <&pinmux_mdio>;
	pinctrl-names = "default";
	status = "okay";
	phy: phy@2 {
		compatible = "realtek,rtl8211f";
		reg = <2>;
		status = "okay";
	};
};

&lpuart1 {
	status = "disabled";
	current-speed = <115200>;
	/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
	pinctrl-0 = <&uart1_default>;
	pinctrl-names = "default";
};

&lpuart2 {
	status = "okay";
	current-speed = <115200>;
	/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
	pinctrl-0 = <&uart2_default>;
	pinctrl-names = "default";
};


&lpi2c1 {
	status = "disabled";
	clock-frequency = <I2C_BITRATE_FAST>;
	pinctrl-0 = <&i2c1_default>;
	pinctrl-names = "default";
};

&lpi2c2 {
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
	pinctrl-0 = <&i2c2_default>;
	pinctrl-names = "default";

	mfd0:adp5585@34 {
		compatible = "adi,adp5585";
		reg = <0x34>;
		status = "okay";

		gpio_exp0: adp5585_gpio {
			compatible = "adi,adp5585-gpio";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <13>;
			gpio-reserved-ranges = <5 3>;
			status = "okay";
			/*
			 * This device has non-contiguous gpio range:
			 *   GPIO Pin R0~R4 are gpio0~4
			 *   GPIO Pin C0~C4 are gpio8~12
			 */
		};
	};

	gpio_exp1: pcal6524@22 {
		compatible = "nxp,pcal6524";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <24>;
		int-gpios = <&gpio3 27 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
		status = "okay";
	};
};

&lpspi3 {
	status = "disabled";
	clock-frequency = <1000000>;
	pinctrl-0 = <&spi3_default>;
	pinctrl-names = "default";
};

&gpio1{
	status = "okay";
};

&gpio2{
	status = "okay";
};

&gpio3{
	status = "okay";
};

&gpio4{
	status = "okay";
};

&flexcan2 {
	pinctrl-0 = <&flexcan2_default>;
	pinctrl-names = "default";
	phys = <&can_phy0>;
	status = "okay";
};