/*
 * Copyright 2020-2022,2024 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <nxp/nxp_mimx8mm_a53.dtsi>
#include "imx8mm_evk-pinctrl.dtsi"

/ {
	model = "NXP i.MX8MM A53";
	compatible = "fsl,mimx8mm";

	chosen {
		zephyr,console = &uart4;
		zephyr,shell-uart = &uart4;
		/* sram node actually locates at DDR DRAM */
		zephyr,sram = &dram;
	};

	cpus {
		cpu@0 {
			status = "disabled";
		};
		cpu@1 {
			status = "disabled";
		};
		cpu@2 {
			status = "disabled";
		};
	};

	dram: memory@93c00000 {
		reg = <0x93c00000 DT_SIZE_M(1)>;
	};
};

&enet {
	status = "okay";
};

&enet_mac {
	pinctrl-0 = <&pinmux_enet>;
	pinctrl-names = "default";
	phy-handle = <&phy>;
	zephyr,random-mac-address;
	phy-connection-type = "rgmii";
	status = "okay";
};

&enet_mdio {
	pinctrl-0 = <&pinmux_mdio>;
	pinctrl-names = "default";
	status = "okay";
	phy: phy@0 {
		compatible = "qca,ar8031";
		reg = <0>;
		status = "okay";
	};
};

&uart4 {
	current-speed = <115200>;
	pinctrl-0 = <&uart4_default>;
	pinctrl-names = "default";
	status = "okay";
};