/* * Copyright (c) 2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ /* This file is common to the secure and non-secure domain */ #include #include "nrf54l20pdk_nrf54l20-common.dtsi" / { chosen { zephyr,console = &uart20; zephyr,shell-uart = &uart20; zephyr,uart-mcumgr = &uart20; zephyr,bt-mon-uart = &uart20; zephyr,bt-c2h-uart = &uart20; zephyr,flash-controller = &rram_controller; zephyr,flash = &cpuapp_rram; zephyr,bt-hci = &bt_hci_controller; zephyr,ieee802154 = &ieee802154; }; }; &cpuapp_sram { status = "okay"; }; &lfxo { load-capacitors = "internal"; load-capacitance-femtofarad = <15500>; }; &hfxo { load-capacitors = "internal"; load-capacitance-femtofarad = <15000>; }; &grtc { owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>; /* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */ child-owned-channels = <3 4 7 8 9 10 11>; status = "okay"; }; &cpuapp_rram { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; boot_partition: partition@0 { label = "mcuboot"; reg = <0x0 DT_SIZE_K(64)>; }; slot0_partition: partition@10000 { label = "image-0"; reg = <0x10000 DT_SIZE_K(449)>; }; slot0_ns_partition: partition@80400 { label = "image-0-nonsecure"; reg = <0x80400 DT_SIZE_K(449)>; }; slot1_partition: partition@f0800 { label = "image-1"; reg = <0xf0800 DT_SIZE_K(449)>; }; slot1_ns_partition: partition@160c00 { label = "image-1-nonsecure"; reg = <0x160c00 DT_SIZE_K(449)>; }; }; }; &uart20 { status = "okay"; }; &gpio0 { status = "okay"; }; &gpio1 { status = "okay"; }; &gpio2 { status = "okay"; }; &gpiote20 { status = "okay"; }; &gpiote30 { status = "okay"; }; &radio { status = "okay"; }; &temp { status = "okay"; }; &clock { status = "okay"; }; &bt_hci_controller { status = "okay"; }; &ieee802154 { status = "okay"; };