/*
 * Copyright (c) 2023 Antmicro <www.antmicro.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
#include "apollo4p_evb_connector.dtsi"

&pinctrl {
	uart0_default: uart0_default {
		group1 {
			pinmux = <UART0TX_P60>;
		};
		group2 {
			pinmux = <UART0RX_P47>;
			input-enable;
		};
	};
	i2c0_default: i2c0_default {
		group1 {
			pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c1_default: i2c1_default {
		group1 {
			pinmux = <M1SCL_P8>, <M1SDAWIR3_P9>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c2_default: i2c2_default {
		group1 {
			pinmux = <M2SCL_P25>, <M2SDAWIR3_P26>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c3_default: i2c3_default {
		group1 {
			pinmux = <M3SCL_P31>, <M3SDAWIR3_P32>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c4_default: i2c4_default {
		group1 {
			pinmux = <M4SCL_P34>, <M4SDAWIR3_P35>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c5_default: i2c5_default {
		group1 {
			pinmux = <M5SCL_P47>, <M5SDAWIR3_P48>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c6_default: i2c6_default {
		group1 {
			pinmux = <M6SCL_P61>, <M6SDAWIR3_P62>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};
	i2c7_default: i2c7_default {
		group1 {
			pinmux = <M7SCL_P22>, <M7SDAWIR3_P23>;
			drive-open-drain;
			drive-strength = "0.5";
			bias-pull-up;
		};
	};

	spi0_default: spi0_default {
		group1 {
			pinmux = <M0SCK_P5>, <M0MISO_P7>, <M0MOSI_P6>;
		};
		group2 {
			pinmux = <NCE72_P72>;
			drive-push-pull;
			ambiq,iom-nce-module = <0>;
		};
	};
	spi1_default: spi1_default {
		group1 {
			pinmux = <M1SCK_P8>, <M1MISO_P10>, <M1MOSI_P9>;
		};
		group2 {
			pinmux = <NCE11_P11>;
			drive-strength = "0.5";
			drive-push-pull;
			ambiq,iom-nce-module = <4>;
		};
	};
	spi2_default: spi2_default {
		group1 {
			pinmux = <M2SCK_P25>, <M2MISO_P27>, <M2MOSI_P26>;
		};
		group2 {
			pinmux = <NCE37_P37>;
			drive-push-pull;
			ambiq,iom-nce-module = <8>;
		};
	};
	spi3_default: spi3_default {
		group1 {
			pinmux = <M3SCK_P31>, <M3MISO_P33>, <M3MOSI_P32>;
		};
		group2 {
			pinmux = <NCE85_P85>;
			drive-push-pull;
			ambiq,iom-nce-module = <12>;
		};
	};
	spi4_default: spi4_default {
		group1 {
			pinmux = <M4SCK_P34>, <M4MISO_P36>, <M4MOSI_P35>;
		};
		group2 {
			pinmux = <NCE79_P79>;
			drive-push-pull;
			ambiq,iom-nce-module = <16>;
		};
	};
	spi5_default: spi5_default {
		group1 {
			pinmux = <M5SCK_P47>, <M5MISO_P49>, <M5MOSI_P48>;
		};
		group2 {
			pinmux = <NCE60_P60>;
			drive-push-pull;
			ambiq,iom-nce-module = <20>;
		};
	};
	spi6_default: spi6_default {
		group1 {
			pinmux = <M6SCK_P61>, <M6MISO_P63>, <M6MOSI_P62>;
		};
		group2 {
			pinmux = <NCE30_P30>;
			drive-push-pull;
			ambiq,iom-nce-module = <24>;
		};
	};
	spi7_default: spi7_default {
		group1 {
			pinmux = <M7SCK_P22>, <M7MISO_P24>, <M7MOSI_P23>;
		};
		group2 {
			pinmux = <NCE88_P88>;
			drive-push-pull;
			ambiq,iom-nce-module = <28>;
		};
	};
	mspi0_default: mspi0_default{
		group1 {
			pinmux = <MSPI0_0_P64>,
				 <MSPI0_1_P65>,
				 <MSPI0_8_P72>;
		};
		group2 {
			pinmux = <NCE57_P57>;
			drive-push-pull;
			drive-strength = "0.5";
			ambiq,iom-nce-module = <32>;
		};
	};
	mspi1_default: mspi1_default{
		group1 {
			pinmux = <MSPI1_0_P37>,
				 <MSPI1_1_P38>,
				 <MSPI1_8_P45>;
		};
		group2 {
			pinmux = <NCE56_P56>;
			drive-push-pull;
			drive-strength = "0.5";
			ambiq,iom-nce-module = <34>;
		};
	};
	mspi2_default: mspi2_default{
		group1 {
			pinmux = <MSPI2_0_P74>,
				 <MSPI2_1_P75>,
				 <MSPI2_8_P82>;
		};
		group2 {
			pinmux = <NCE0_P0>;
			drive-push-pull;
			drive-strength = "0.5";
			ambiq,iom-nce-module = <36>;
		};
	};
};