/*
 * Copyright (c) 2022 Seco Spa
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <st/f3/stm32f302.dtsi>

/ {
	sram0: memory@20000000 {
		reg = <0x20000000 DT_SIZE_K(40)>;
	};

	soc {
		flash-controller@40022000 {
			flash0: flash@8000000 {
				reg = <0x08000000 DT_SIZE_K(256)>;
			};
		};

		dma2: dma@40020400 {
			compatible = "st,stm32-dma-v2bis";
			#dma-cells = <2>;
			reg = <0x40020400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
			interrupts = <56 0 57 0 58 0 59 0 60 0>;
			status = "disabled";
		};

		uart5: serial@40005000 {
			compatible = "st,stm32-uart";
			reg = <0x40005000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
			interrupts = <53 0>;
			status = "disabled";
		};

		pinctrl: pin-controller@48000000 {
			gpioe: gpio@48001000 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x48001000 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00200000>;
			};
		};
	};
};

/delete-node/ &i2c3;