29 	uint32_t i, val;  in disable_pwms()  local
34 	val = mmio_read_32(GRF_BASE + GRF_GPIO4C_IOMUX);  in disable_pwms()
35 	if (((val >> GRF_GPIO4C2_IOMUX_SHIFT) &  in disable_pwms()
38 		val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,  in disable_pwms()
40 		mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);  in disable_pwms()
43 	val = mmio_read_32(GRF_BASE + GRF_GPIO4C_IOMUX);  in disable_pwms()
44 	if (((val >> GRF_GPIO4C6_IOMUX_SHIFT) &  in disable_pwms()
47 		val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,  in disable_pwms()
49 		mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);  in disable_pwms()
52 	val = mmio_read_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX);  in disable_pwms()
53 	if (((val >> PMUGRF_GPIO1C3_IOMUX_SHIFT) &  in disable_pwms()
56 		val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,  in disable_pwms()
58 		mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX, val);  in disable_pwms()
61 	val = mmio_read_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX);  in disable_pwms()
62 	if (((val >> PMUGRF_GPIO0A6_IOMUX_SHIFT) &  in disable_pwms()
65 		val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,  in disable_pwms()
67 		mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX, val);  in disable_pwms()
73 		val = mmio_read_32(PWM_BASE + PWM_CTRL(i));  in disable_pwms()
74 		if ((val & PWM_ENABLE) != PWM_ENABLE)  in disable_pwms()
77 		mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE);  in disable_pwms()
86 	uint32_t i, val;  in enable_pwms()  local
89 		val = mmio_read_32(PWM_BASE + PWM_CTRL(i));  in enable_pwms()
92 		mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE);  in enable_pwms()
97 		val = BITS_WITH_WMASK(PMUGRF_GPIO0A6_IOMUX_PWM,  in enable_pwms()
100 		mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX, val);  in enable_pwms()
104 		val = BITS_WITH_WMASK(PMUGRF_GPIO1C3_IOMUX_PWM,  in enable_pwms()
107 		mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX, val);  in enable_pwms()
111 		val = BITS_WITH_WMASK(GRF_GPIO4C6_IOMUX_PWM,  in enable_pwms()
114 		mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);  in enable_pwms()
118 		val = BITS_WITH_WMASK(GRF_GPIO4C2_IOMUX_PWM,  in enable_pwms()
121 		mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);  in enable_pwms()