27 #define CRU_SFTRST_DDR_CTRL(ch, n)	((0x1 << (8 + 16 + (ch) * 4)) | \  argument
29 #define CRU_SFTRST_DDR_PHY(ch, n)	((0x1 << (9 + 16 + (ch) * 4)) | \  argument
32 #define FBDIV_ENC(n)			((n) << 16)  argument
33 #define FBDIV_DEC(n)			(((n) >> 16) & 0xfff)  argument
34 #define POSTDIV2_ENC(n)			((n) << 12)  argument
35 #define POSTDIV2_DEC(n)			(((n) >> 12) & 0x7)  argument
36 #define POSTDIV1_ENC(n)			((n) << 8)  argument
37 #define POSTDIV1_DEC(n)			(((n) >> 8) & 0x7)  argument
38 #define REFDIV_ENC(n)			(n)  argument
39 #define REFDIV_DEC(n)			((n) & 0x3f)  argument
45 #define PRESET_GPIO0_HOLD(n)		(((n) << 7) | WMSK_BIT(7))  argument
46 #define PRESET_GPIO1_HOLD(n)		(((n) << 8) | WMSK_BIT(8))  argument