106 	uint32_t tmp;  in get_dram_drv_odt_val()  local
112 		tmp = ((mr1_val >> 1) & 1) | ((mr1_val >> 4) & 1);  in get_dram_drv_odt_val()
113 		if (tmp)  in get_dram_drv_odt_val()
117 		tmp = ((mr1_val >> 2) & 1) | ((mr1_val >> 5) & 1) |  in get_dram_drv_odt_val()
119 		if (tmp == 0)  in get_dram_drv_odt_val()
121 		else if (tmp == 1)  in get_dram_drv_odt_val()
123 		else if (tmp == 3)  in get_dram_drv_odt_val()
165 		tmp = mr11_val & 0x7;  in get_dram_drv_odt_val()
166 		if ((tmp == 7) || (tmp == 0))  in get_dram_drv_odt_val()
169 			drv_config->dram_side_dq_odt = 240 / tmp;  in get_dram_drv_odt_val()
171 		tmp = (mr11_val >> 4) & 0x7;  in get_dram_drv_odt_val()
172 		if ((tmp == 7) || (tmp == 0))  in get_dram_drv_odt_val()
175 			drv_config->dram_side_ca_odt = 240 / tmp;  in get_dram_drv_odt_val()
363 	uint32_t tmp;  in get_pi_wrlat()  local
366 		tmp = pdram_timing->cl;  in get_pi_wrlat()
367 		if (tmp >= 14)  in get_pi_wrlat()
368 			tmp = 8;  in get_pi_wrlat()
369 		else if (tmp >= 10)  in get_pi_wrlat()
370 			tmp = 6;  in get_pi_wrlat()
371 		else if (tmp == 9)  in get_pi_wrlat()
372 			tmp = 5;  in get_pi_wrlat()
373 		else if (tmp == 8)  in get_pi_wrlat()
374 			tmp = 4;  in get_pi_wrlat()
375 		else if (tmp == 6)  in get_pi_wrlat()
376 			tmp = 3;  in get_pi_wrlat()
378 			tmp = 1;  in get_pi_wrlat()
380 		tmp = 1;  in get_pi_wrlat()
383 	return tmp;  in get_pi_wrlat()
452 	uint32_t tmp, todtoff_min_ps;  in get_pi_todtoff_min()  local
461 	tmp = todtoff_min_ps / (1000000 / pdram_timing->mhz);  in get_pi_todtoff_min()
463 		tmp++;  in get_pi_todtoff_min()
464 	return tmp;  in get_pi_todtoff_min()
470 	uint32_t tmp, todtoff_max_ps;  in get_pi_todtoff_max()  local
479 	tmp = todtoff_max_ps / (1000000 / pdram_timing->mhz);  in get_pi_todtoff_max()
481 		tmp++;  in get_pi_todtoff_max()
482 	return tmp;  in get_pi_todtoff_max()
490 	uint32_t tmp, tmp1;  in gen_rk3399_ctl_params_f0()  local
494 			tmp = ((700000 + 10) * timing_config->freq +  in gen_rk3399_ctl_params_f0()
496 			tmp += pdram_timing->txsnr + (pdram_timing->tmrd * 3) +  in gen_rk3399_ctl_params_f0()
498 			mmio_write_32(CTL_REG(i, 5), tmp);  in gen_rk3399_ctl_params_f0()
555 		tmp = pdram_timing->tdal ? pdram_timing->tdal :  in gen_rk3399_ctl_params_f0()
557 		mmio_clrsetbits_32(CTL_REG(i, 44), 0xff, tmp);  in gen_rk3399_ctl_params_f0()
641 				tmp = 4 << 24;  in gen_rk3399_ctl_params_f0()
643 				tmp = 8 << 24;  in gen_rk3399_ctl_params_f0()
646 			tmp = 2 << 24;  in gen_rk3399_ctl_params_f0()
649 		mmio_clrsetbits_32(CTL_REG(i, 216), 0x1f << 24, tmp);  in gen_rk3399_ctl_params_f0()
653 		tmp =  in gen_rk3399_ctl_params_f0()
657 		mmio_clrsetbits_32(CTL_REG(i, 284), 0xffff, tmp);  in gen_rk3399_ctl_params_f0()
666 			tmp = get_pi_wrlat(pdram_timing, timing_config);  in gen_rk3399_ctl_params_f0()
668 			tmp = (tmp > tmp1) ? (tmp - tmp1) : 0;  in gen_rk3399_ctl_params_f0()
670 			tmp = 0;  in gen_rk3399_ctl_params_f0()
673 				   (tmp & 0x3f) << 16);  in gen_rk3399_ctl_params_f0()
678 			tmp = pdram_timing->cl +  in gen_rk3399_ctl_params_f0()
682 			tmp = (tmp > tmp1) ? (tmp - tmp1) : 0;  in gen_rk3399_ctl_params_f0()
684 			tmp = pdram_timing->cl - pdram_timing->cwl;  in gen_rk3399_ctl_params_f0()
687 				   (tmp & 0x3f) << 8);  in gen_rk3399_ctl_params_f0()
706 		tmp = (tmp1 >> 1) + (tmp1 % 2) + 5;  in gen_rk3399_ctl_params_f0()
707 		mmio_clrsetbits_32(CTL_REG(i, 308), 0x3ff << 16, tmp << 16);  in gen_rk3399_ctl_params_f0()
710 		tmp = tmp + 18;  in gen_rk3399_ctl_params_f0()
711 		mmio_clrsetbits_32(CTL_REG(i, 308), 0x3ff, tmp);  in gen_rk3399_ctl_params_f0()
717 				tmp = 0;  in gen_rk3399_ctl_params_f0()
719 				tmp = tmp1 - 1;  in gen_rk3399_ctl_params_f0()
721 				tmp = tmp1 - 5;  in gen_rk3399_ctl_params_f0()
723 			tmp = tmp1 - 2;  in gen_rk3399_ctl_params_f0()
725 		mmio_clrsetbits_32(CTL_REG(i, 314), 0xff << 8, tmp << 8);  in gen_rk3399_ctl_params_f0()
730 			tmp = pdram_timing->cl - 5;  in gen_rk3399_ctl_params_f0()
732 			tmp = pdram_timing->cl - 2;  in gen_rk3399_ctl_params_f0()
733 		mmio_clrsetbits_32(CTL_REG(i, 314), 0xff, tmp);  in gen_rk3399_ctl_params_f0()
742 	uint32_t tmp, tmp1;  in gen_rk3399_ctl_params_f1()  local
746 			tmp =  in gen_rk3399_ctl_params_f1()
748 			tmp += pdram_timing->txsnr + (pdram_timing->tmrd * 3) +  in gen_rk3399_ctl_params_f1()
750 			mmio_write_32(CTL_REG(i, 9), tmp);  in gen_rk3399_ctl_params_f1()
804 		tmp = pdram_timing->tdal ? pdram_timing->tdal :  in gen_rk3399_ctl_params_f1()
806 		mmio_clrsetbits_32(CTL_REG(i, 44), 0xff << 8, tmp << 8);  in gen_rk3399_ctl_params_f1()
890 				tmp = 4 << 24;  in gen_rk3399_ctl_params_f1()
892 				tmp = 8 << 24;  in gen_rk3399_ctl_params_f1()
895 			tmp = 2 << 24;  in gen_rk3399_ctl_params_f1()
897 		mmio_clrsetbits_32(CTL_REG(i, 217), 0x1f << 24, tmp);  in gen_rk3399_ctl_params_f1()
915 			tmp = get_pi_wrlat(pdram_timing, timing_config);  in gen_rk3399_ctl_params_f1()
917 			tmp = (tmp > tmp1) ? (tmp - tmp1) : 0;  in gen_rk3399_ctl_params_f1()
919 			tmp = 0;  in gen_rk3399_ctl_params_f1()
922 				   (tmp & 0x3f) << 24);  in gen_rk3399_ctl_params_f1()
927 			tmp = pdram_timing->cl +  in gen_rk3399_ctl_params_f1()
929 			tmp--;  in gen_rk3399_ctl_params_f1()
932 			tmp = (tmp > tmp1) ? (tmp - tmp1) : 0;  in gen_rk3399_ctl_params_f1()
934 			tmp = pdram_timing->cl - pdram_timing->cwl;  in gen_rk3399_ctl_params_f1()
937 				   (tmp & 0x3f) << 16);  in gen_rk3399_ctl_params_f1()
956 		tmp = (tmp1 >> 1) + (tmp1 % 2) + 5;  in gen_rk3399_ctl_params_f1()
957 		mmio_clrsetbits_32(CTL_REG(i, 309), 0x3ff << 16, tmp << 16);  in gen_rk3399_ctl_params_f1()
960 		tmp = tmp + 18;  in gen_rk3399_ctl_params_f1()
961 		mmio_clrsetbits_32(CTL_REG(i, 309), 0x3ff, tmp);  in gen_rk3399_ctl_params_f1()
967 				tmp = 0;  in gen_rk3399_ctl_params_f1()
969 				tmp = tmp1 - 1;  in gen_rk3399_ctl_params_f1()
971 				tmp = tmp1 - 5;  in gen_rk3399_ctl_params_f1()
973 			tmp = tmp1 - 2;  in gen_rk3399_ctl_params_f1()
976 		mmio_clrsetbits_32(CTL_REG(i, 314), 0xffu << 24, tmp << 24);  in gen_rk3399_ctl_params_f1()
981 			tmp = pdram_timing->cl - 5;  in gen_rk3399_ctl_params_f1()
983 			tmp = pdram_timing->cl - 2;  in gen_rk3399_ctl_params_f1()
984 		mmio_clrsetbits_32(CTL_REG(i, 314), 0xff << 16, tmp << 16);  in gen_rk3399_ctl_params_f1()
990 		uint32_t i, tmp;  in gen_rk3399_enable_training()  local
993 			tmp = 0;  in gen_rk3399_enable_training()
995 			tmp = 1;  in gen_rk3399_enable_training()
998 			mmio_clrsetbits_32(CTL_REG(i, 305), 1 << 16, tmp << 16);  in gen_rk3399_enable_training()
999 			mmio_clrsetbits_32(CTL_REG(i, 71), 1, tmp);  in gen_rk3399_enable_training()
1028 	uint32_t tmp, tmp1, tmp2;  in gen_rk3399_pi_params_f0()  local
1033 		tmp = 4 * pdram_timing->trefi;  in gen_rk3399_pi_params_f0()
1034 		mmio_write_32(PI_REG(i, 2), tmp);  in gen_rk3399_pi_params_f0()
1036 		tmp = 2 * pdram_timing->trefi;  in gen_rk3399_pi_params_f0()
1037 		mmio_clrsetbits_32(PI_REG(i, 3), 0xffff, tmp);  in gen_rk3399_pi_params_f0()
1039 		mmio_clrsetbits_32(PI_REG(i, 7), 0xffffu << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1043 			tmp = 2;  in gen_rk3399_pi_params_f0()
1045 			tmp = 0;  in gen_rk3399_pi_params_f0()
1046 		tmp = (pdram_timing->bl / 2) + 4 +  in gen_rk3399_pi_params_f0()
1047 		      (get_pi_rdlat_adj(pdram_timing) - 2) + tmp +  in gen_rk3399_pi_params_f0()
1049 		mmio_clrsetbits_32(PI_REG(i, 42), 0xff, tmp);  in gen_rk3399_pi_params_f0()
1052 			tmp = get_pi_wrlat(pdram_timing, timing_config);  in gen_rk3399_pi_params_f0()
1053 			mmio_clrsetbits_32(PI_REG(i, 43), 0x1f, tmp);  in gen_rk3399_pi_params_f0()
1069 			tmp = get_pi_todtoff_max(pdram_timing, timing_config);  in gen_rk3399_pi_params_f0()
1071 					   tmp << 24);  in gen_rk3399_pi_params_f0()
1079 				tmp = tmp1 - tmp2;  in gen_rk3399_pi_params_f0()
1081 				tmp = 0;  in gen_rk3399_pi_params_f0()
1083 			tmp = 0;  in gen_rk3399_pi_params_f0()
1085 		mmio_clrsetbits_32(PI_REG(i, 72), 0x3f << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1096 				tmp = tmp1 - tmp2;  in gen_rk3399_pi_params_f0()
1098 				tmp = 0;  in gen_rk3399_pi_params_f0()
1100 			tmp = pdram_timing->cl - pdram_timing->cwl;  in gen_rk3399_pi_params_f0()
1102 		mmio_clrsetbits_32(PI_REG(i, 73), 0x3f << 8, tmp << 8);  in gen_rk3399_pi_params_f0()
1104 		tmp = get_pi_rdlat_adj(pdram_timing);  in gen_rk3399_pi_params_f0()
1105 		mmio_clrsetbits_32(PI_REG(i, 89), 0xff << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1107 		tmp = get_pi_wrlat_adj(pdram_timing, timing_config);  in gen_rk3399_pi_params_f0()
1108 		mmio_clrsetbits_32(PI_REG(i, 90), 0xff << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1110 		tmp1 = tmp;  in gen_rk3399_pi_params_f0()
1112 			tmp = 0;  in gen_rk3399_pi_params_f0()
1114 			tmp = tmp1 - 1;  in gen_rk3399_pi_params_f0()
1116 			tmp = tmp1 - 5;  in gen_rk3399_pi_params_f0()
1117 		mmio_clrsetbits_32(PI_REG(i, 91), 0xff << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1122 		tmp = (tmp1 >> 1) + (tmp1 % 2) + 5;  in gen_rk3399_pi_params_f0()
1123 		mmio_clrsetbits_32(PI_REG(i, 95), 0x3ff << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1125 		mmio_clrsetbits_32(PI_REG(i, 95), 0x3ff, tmp + 18);  in gen_rk3399_pi_params_f0()
1134 		tmp = tmp1 + 5;  in gen_rk3399_pi_params_f0()
1135 		mmio_clrsetbits_32(PI_REG(i, 111), 0xf << 8, tmp << 8);  in gen_rk3399_pi_params_f0()
1137 		tmp = 10000 / (1000000 / pdram_timing->mhz);  in gen_rk3399_pi_params_f0()
1139 			tmp++;  in gen_rk3399_pi_params_f0()
1141 			tmp = tmp + 1;  in gen_rk3399_pi_params_f0()
1143 			tmp = tmp + 8;  in gen_rk3399_pi_params_f0()
1144 		mmio_clrsetbits_32(PI_REG(i, 116), 0x3f << 16, tmp << 16);  in gen_rk3399_pi_params_f0()
1186 		tmp = pdram_timing->tras_max * 99 / 100;  in gen_rk3399_pi_params_f0()
1187 		mmio_clrsetbits_32(PI_REG(i, 159), 0x1ffff, tmp);  in gen_rk3399_pi_params_f0()
1206 	uint32_t tmp, tmp1, tmp2;  in gen_rk3399_pi_params_f1()  local
1211 		tmp = 4 * pdram_timing->trefi;  in gen_rk3399_pi_params_f1()
1212 		mmio_write_32(PI_REG(i, 4), tmp);  in gen_rk3399_pi_params_f1()
1214 		tmp = 2 * pdram_timing->trefi;  in gen_rk3399_pi_params_f1()
1215 		mmio_clrsetbits_32(PI_REG(i, 5), 0xffff, tmp);  in gen_rk3399_pi_params_f1()
1217 		mmio_clrsetbits_32(PI_REG(i, 12), 0xffff, tmp);  in gen_rk3399_pi_params_f1()
1221 			tmp = 2;  in gen_rk3399_pi_params_f1()
1223 			tmp = 0;  in gen_rk3399_pi_params_f1()
1224 		tmp = (pdram_timing->bl / 2) + 4 +  in gen_rk3399_pi_params_f1()
1225 		      (get_pi_rdlat_adj(pdram_timing) - 2) + tmp +  in gen_rk3399_pi_params_f1()
1227 		mmio_clrsetbits_32(PI_REG(i, 42), 0xff << 8, tmp << 8);  in gen_rk3399_pi_params_f1()
1230 			tmp = get_pi_wrlat(pdram_timing, timing_config);  in gen_rk3399_pi_params_f1()
1232 					   tmp << 24);  in gen_rk3399_pi_params_f1()
1246 			tmp = get_pi_todtoff_max(pdram_timing, timing_config);  in gen_rk3399_pi_params_f1()
1247 			mmio_clrsetbits_32(PI_REG(i, 67), 0xff << 8, tmp << 8);  in gen_rk3399_pi_params_f1()
1255 				tmp = tmp1 - tmp2;  in gen_rk3399_pi_params_f1()
1257 				tmp = 0;  in gen_rk3399_pi_params_f1()
1259 			tmp = 0;  in gen_rk3399_pi_params_f1()
1261 		mmio_clrsetbits_32(PI_REG(i, 72), 0x3f << 24, tmp << 24);  in gen_rk3399_pi_params_f1()
1272 				tmp = tmp1 - tmp2;  in gen_rk3399_pi_params_f1()
1274 				tmp = 0;  in gen_rk3399_pi_params_f1()
1276 			tmp = pdram_timing->cl - pdram_timing->cwl;  in gen_rk3399_pi_params_f1()
1278 		mmio_clrsetbits_32(PI_REG(i, 73), 0x3f << 16, tmp << 16);  in gen_rk3399_pi_params_f1()
1280 		tmp = get_pi_rdlat_adj(pdram_timing);  in gen_rk3399_pi_params_f1()
1281 		mmio_clrsetbits_32(PI_REG(i, 89), 0xffu << 24, tmp << 24);  in gen_rk3399_pi_params_f1()
1283 		tmp = get_pi_wrlat_adj(pdram_timing, timing_config);  in gen_rk3399_pi_params_f1()
1284 		mmio_clrsetbits_32(PI_REG(i, 90), 0xffu << 24, tmp << 24);  in gen_rk3399_pi_params_f1()
1286 		tmp1 = tmp;  in gen_rk3399_pi_params_f1()
1288 			tmp = 0;  in gen_rk3399_pi_params_f1()
1290 			tmp = tmp1 - 1;  in gen_rk3399_pi_params_f1()
1292 			tmp = tmp1 - 5;  in gen_rk3399_pi_params_f1()
1293 		mmio_clrsetbits_32(PI_REG(i, 91), 0xffu << 24, tmp << 24);  in gen_rk3399_pi_params_f1()
1299 		tmp = (tmp1 >> 1) + (tmp1 % 2) + 5;  in gen_rk3399_pi_params_f1()
1300 		mmio_clrsetbits_32(PI_REG(i, 96), 0x3ff << 16, tmp << 16);  in gen_rk3399_pi_params_f1()
1302 		tmp = tmp + 18;  in gen_rk3399_pi_params_f1()
1303 		mmio_clrsetbits_32(PI_REG(i, 96), 0x3ff, tmp);  in gen_rk3399_pi_params_f1()
1312 		tmp = tmp1 + 5;  in gen_rk3399_pi_params_f1()
1314 				   tmp << 16);  in gen_rk3399_pi_params_f1()
1316 		tmp = 10000 / (1000000 / pdram_timing->mhz);  in gen_rk3399_pi_params_f1()
1318 			tmp++;  in gen_rk3399_pi_params_f1()
1320 			tmp = tmp + 1;  in gen_rk3399_pi_params_f1()
1322 			tmp = tmp + 8;  in gen_rk3399_pi_params_f1()
1324 				   tmp << 24);  in gen_rk3399_pi_params_f1()
1505 	uint32_t tmp, i, div, j;  in gen_rk3399_phy_params()  local
1528 		tmp = 2500 / (1000000 / pdram_timing->mhz) + 3;  in gen_rk3399_phy_params()
1530 			tmp++;  in gen_rk3399_phy_params()
1531 		mmio_clrsetbits_32(PHY_REG(i, 87), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1532 		mmio_clrsetbits_32(PHY_REG(i, 215), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1533 		mmio_clrsetbits_32(PHY_REG(i, 343), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1534 		mmio_clrsetbits_32(PHY_REG(i, 471), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1540 		tmp = (1 << 12) | (2 << 7) | (1 << 1);  in gen_rk3399_phy_params()
1541 		mmio_clrsetbits_32(PHY_REG(i, 911), 0x1fff, tmp);  in gen_rk3399_phy_params()
1542 		mmio_clrsetbits_32(PHY_REG(i, 919), 0x1fff, tmp);  in gen_rk3399_phy_params()
1548 		tmp = (2 << 7) | (1 << 5) | (1 << 1);  in gen_rk3399_phy_params()
1549 		mmio_clrsetbits_32(PHY_REG(i, 911), 0x1fff << 16, tmp << 16);  in gen_rk3399_phy_params()
1550 		mmio_clrsetbits_32(PHY_REG(i, 919), 0x1fff << 16, tmp << 16);  in gen_rk3399_phy_params()
1555 			tmp = 1;  in gen_rk3399_phy_params()
1557 			tmp = 3;  in gen_rk3399_phy_params()
1559 			tmp = 4;  in gen_rk3399_phy_params()
1561 			tmp = 5;  in gen_rk3399_phy_params()
1562 		mmio_clrsetbits_32(PHY_REG(i, 922), 0xf << 24, tmp << 24);  in gen_rk3399_phy_params()
1565 		for (j = 2, tmp = 1; j <= 128; j <<= 1, tmp++) {  in gen_rk3399_phy_params()
1569 		mmio_clrsetbits_32(PHY_REG(i, 947), 0x7 << 8, tmp << 8);  in gen_rk3399_phy_params()
1589 		tmp = gate_delay_frac_ps * 0x200 / 1000;  in gen_rk3399_phy_params()
1592 		mmio_clrsetbits_32(PHY_REG(i, 77), 0x2ff << 16, tmp << 16);  in gen_rk3399_phy_params()
1593 		mmio_clrsetbits_32(PHY_REG(i, 205), 0x2ff << 16, tmp << 16);  in gen_rk3399_phy_params()
1594 		mmio_clrsetbits_32(PHY_REG(i, 333), 0x2ff << 16, tmp << 16);  in gen_rk3399_phy_params()
1595 		mmio_clrsetbits_32(PHY_REG(i, 461), 0x2ff << 16, tmp << 16);  in gen_rk3399_phy_params()
1597 		tmp = gate_delay_ps / 1000;  in gen_rk3399_phy_params()
1600 		mmio_clrsetbits_32(PHY_REG(i, 10), 0xf, tmp);  in gen_rk3399_phy_params()
1601 		mmio_clrsetbits_32(PHY_REG(i, 138), 0xf, tmp);  in gen_rk3399_phy_params()
1602 		mmio_clrsetbits_32(PHY_REG(i, 266), 0xf, tmp);  in gen_rk3399_phy_params()
1603 		mmio_clrsetbits_32(PHY_REG(i, 394), 0xf, tmp);  in gen_rk3399_phy_params()
1606 		tmp = rddqs_delay_ps / (1000000 / pdram_timing->mhz) + 2;  in gen_rk3399_phy_params()
1607 		mmio_clrsetbits_32(PHY_REG(i, 80), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1608 		mmio_clrsetbits_32(PHY_REG(i, 208), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1609 		mmio_clrsetbits_32(PHY_REG(i, 336), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1610 		mmio_clrsetbits_32(PHY_REG(i, 464), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1630 			tmp = 0;  in gen_rk3399_phy_params()
1632 			tmp = rddata_en_ie_dly - 0 - extra_adder;  in gen_rk3399_phy_params()
1634 			tmp = extra_adder;  in gen_rk3399_phy_params()
1637 		mmio_clrsetbits_32(PHY_REG(i, 9), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1638 		mmio_clrsetbits_32(PHY_REG(i, 137), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1639 		mmio_clrsetbits_32(PHY_REG(i, 265), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1640 		mmio_clrsetbits_32(PHY_REG(i, 393), 0xf << 16, tmp << 16);  in gen_rk3399_phy_params()
1643 		mmio_clrsetbits_32(PHY_REG(i, 86), 0xf, tmp);  in gen_rk3399_phy_params()
1644 		mmio_clrsetbits_32(PHY_REG(i, 214), 0xf, tmp);  in gen_rk3399_phy_params()
1645 		mmio_clrsetbits_32(PHY_REG(i, 342), 0xf, tmp);  in gen_rk3399_phy_params()
1646 		mmio_clrsetbits_32(PHY_REG(i, 470), 0xf, tmp);  in gen_rk3399_phy_params()
1653 			tmp = tsel_adder;  in gen_rk3399_phy_params()
1655 			tmp = rddata_en_ie_dly - 0 + extra_adder;  in gen_rk3399_phy_params()
1658 		mmio_clrsetbits_32(PHY_REG(i, 9), 0xf << 8, tmp << 8);  in gen_rk3399_phy_params()
1659 		mmio_clrsetbits_32(PHY_REG(i, 137), 0xf << 8, tmp << 8);  in gen_rk3399_phy_params()
1660 		mmio_clrsetbits_32(PHY_REG(i, 265), 0xf << 8, tmp << 8);  in gen_rk3399_phy_params()
1661 		mmio_clrsetbits_32(PHY_REG(i, 393), 0xf << 8, tmp << 8);  in gen_rk3399_phy_params()
1664 		mmio_clrsetbits_32(PHY_REG(i, 85), 0xf << 24, tmp << 24);  in gen_rk3399_phy_params()
1665 		mmio_clrsetbits_32(PHY_REG(i, 213), 0xf << 24, tmp << 24);  in gen_rk3399_phy_params()
1666 		mmio_clrsetbits_32(PHY_REG(i, 341), 0xf << 24, tmp << 24);  in gen_rk3399_phy_params()
1667 		mmio_clrsetbits_32(PHY_REG(i, 469), 0xf << 24, tmp << 24);  in gen_rk3399_phy_params()
1743 	uint32_t tmp, i;  in exit_low_power()  local
1755 		tmp = i ? 12 : 8;  in exit_low_power()
1756 		low_power |= ((mmio_read_32(PMU_BASE + PMU_SFT_CON) >> tmp) &  in exit_low_power()
1758 		mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, 1 << tmp);  in exit_low_power()
1781 	uint32_t tmp, i, val;  in resume_low_power()  local
1790 		tmp = i ? 12 : 8;  in resume_low_power()
1792 		mmio_setbits_32(PMU_BASE + PMU_SFT_CON, val << tmp);  in resume_low_power()
1805 	uint32_t tmp, i;  in dram_low_power_config()  local
1810 		tmp = (2 << 16) | (0x7 << 8);  in dram_low_power_config()
1812 		tmp = (3 << 16) | (0x7 << 8);  in dram_low_power_config()
1815 		mmio_clrsetbits_32(CTL_REG(i, 101), 0x70f0f, tmp);  in dram_low_power_config()