Lines Matching refs:pdram_timing
318 static uint32_t get_pi_rdlat_adj(struct dram_timing_t *pdram_timing) in get_pi_rdlat_adj() argument
327 rdlat = pdram_timing->cl + PI_ADD_LATENCY; in get_pi_rdlat_adj()
328 delay_adder = ie_enable / (1000000 / pdram_timing->mhz); in get_pi_rdlat_adj()
329 if ((ie_enable % (1000000 / pdram_timing->mhz)) != 0) in get_pi_rdlat_adj()
335 tsel_adder = tsel_enable / (1000000 / pdram_timing->mhz); in get_pi_rdlat_adj()
336 if ((tsel_enable % (1000000 / pdram_timing->mhz)) != 0) in get_pi_rdlat_adj()
360 static uint32_t get_pi_wrlat(struct dram_timing_t *pdram_timing, in get_pi_wrlat() argument
366 tmp = pdram_timing->cl; in get_pi_wrlat()
386 static uint32_t get_pi_wrlat_adj(struct dram_timing_t *pdram_timing, in get_pi_wrlat_adj() argument
389 return get_pi_wrlat(pdram_timing, timing_config) + PI_ADD_LATENCY - 1; in get_pi_wrlat_adj()
392 static uint32_t get_pi_tdfi_phy_rdlat(struct dram_timing_t *pdram_timing, in get_pi_tdfi_phy_rdlat() argument
402 delay_adder = ie_enable / (1000000 / pdram_timing->mhz); in get_pi_tdfi_phy_rdlat()
403 if ((ie_enable % (1000000 / pdram_timing->mhz)) != 0) in get_pi_tdfi_phy_rdlat()
411 cas_lat = pdram_timing->cl + PI_ADD_LATENCY; in get_pi_tdfi_phy_rdlat()
416 ie_delay_adder = ie_enable / (1000000 / pdram_timing->mhz); in get_pi_tdfi_phy_rdlat()
417 if ((ie_enable % (1000000 / pdram_timing->mhz)) != 0) in get_pi_tdfi_phy_rdlat()
432 delay_adder = round_trip_ps / (1000000 / pdram_timing->mhz); in get_pi_tdfi_phy_rdlat()
433 if ((round_trip_ps % (1000000 / pdram_timing->mhz)) != 0) in get_pi_tdfi_phy_rdlat()
437 lpddr_adder = mem_delay_ps / (1000000 / pdram_timing->mhz); in get_pi_tdfi_phy_rdlat()
438 if ((mem_delay_ps % (1000000 / pdram_timing->mhz)) != 0) in get_pi_tdfi_phy_rdlat()
449 static uint32_t get_pi_todtoff_min(struct dram_timing_t *pdram_timing, in get_pi_todtoff_min() argument
461 tmp = todtoff_min_ps / (1000000 / pdram_timing->mhz); in get_pi_todtoff_min()
462 if ((todtoff_min_ps % (1000000 / pdram_timing->mhz)) != 0) in get_pi_todtoff_min()
467 static uint32_t get_pi_todtoff_max(struct dram_timing_t *pdram_timing, in get_pi_todtoff_max() argument
479 tmp = todtoff_max_ps / (1000000 / pdram_timing->mhz); in get_pi_todtoff_max()
480 if ((todtoff_max_ps % (1000000 / pdram_timing->mhz)) != 0) in get_pi_todtoff_max()
487 struct dram_timing_t *pdram_timing) in gen_rk3399_ctl_params_f0() argument
496 tmp += pdram_timing->txsnr + (pdram_timing->tmrd * 3) + in gen_rk3399_ctl_params_f0()
497 pdram_timing->tmod + pdram_timing->tzqinit; in gen_rk3399_ctl_params_f0()
501 pdram_timing->tdllk); in gen_rk3399_ctl_params_f0()
504 (pdram_timing->tmod << 8) | in gen_rk3399_ctl_params_f0()
505 pdram_timing->tmrd); in gen_rk3399_ctl_params_f0()
508 (pdram_timing->txsr - in gen_rk3399_ctl_params_f0()
509 pdram_timing->trcd) << 16); in gen_rk3399_ctl_params_f0()
511 mmio_write_32(CTL_REG(i, 5), pdram_timing->tinit1 + in gen_rk3399_ctl_params_f0()
512 pdram_timing->tinit3); in gen_rk3399_ctl_params_f0()
514 (pdram_timing->tmrd << 8) | in gen_rk3399_ctl_params_f0()
515 pdram_timing->tmrd); in gen_rk3399_ctl_params_f0()
517 pdram_timing->txsr << 16); in gen_rk3399_ctl_params_f0()
519 mmio_write_32(CTL_REG(i, 5), pdram_timing->tinit1); in gen_rk3399_ctl_params_f0()
520 mmio_write_32(CTL_REG(i, 7), pdram_timing->tinit4); in gen_rk3399_ctl_params_f0()
522 (pdram_timing->tmrd << 8) | in gen_rk3399_ctl_params_f0()
523 pdram_timing->tmrd); in gen_rk3399_ctl_params_f0()
525 pdram_timing->txsr << 16); in gen_rk3399_ctl_params_f0()
527 mmio_write_32(CTL_REG(i, 6), pdram_timing->tinit3); in gen_rk3399_ctl_params_f0()
528 mmio_write_32(CTL_REG(i, 8), pdram_timing->tinit5); in gen_rk3399_ctl_params_f0()
530 ((pdram_timing->cl * 2) << 16)); in gen_rk3399_ctl_params_f0()
532 (pdram_timing->cwl << 24)); in gen_rk3399_ctl_params_f0()
533 mmio_clrsetbits_32(CTL_REG(i, 24), 0x3f, pdram_timing->al); in gen_rk3399_ctl_params_f0()
535 (pdram_timing->trc << 24) | in gen_rk3399_ctl_params_f0()
536 (pdram_timing->trrd << 16)); in gen_rk3399_ctl_params_f0()
538 (pdram_timing->tfaw << 24) | in gen_rk3399_ctl_params_f0()
539 (pdram_timing->trppb << 16) | in gen_rk3399_ctl_params_f0()
540 (pdram_timing->twtr << 8) | in gen_rk3399_ctl_params_f0()
541 pdram_timing->tras_min); in gen_rk3399_ctl_params_f0()
544 max(4, pdram_timing->trtp) << 24); in gen_rk3399_ctl_params_f0()
545 mmio_write_32(CTL_REG(i, 33), (pdram_timing->tcke << 24) | in gen_rk3399_ctl_params_f0()
546 pdram_timing->tras_max); in gen_rk3399_ctl_params_f0()
548 max(1, pdram_timing->tckesr)); in gen_rk3399_ctl_params_f0()
551 (pdram_timing->twr << 16) | in gen_rk3399_ctl_params_f0()
552 (pdram_timing->trcd << 8)); in gen_rk3399_ctl_params_f0()
554 pdram_timing->tmrz << 16); in gen_rk3399_ctl_params_f0()
555 tmp = pdram_timing->tdal ? pdram_timing->tdal : in gen_rk3399_ctl_params_f0()
556 (pdram_timing->twr + pdram_timing->trp); in gen_rk3399_ctl_params_f0()
558 mmio_clrsetbits_32(CTL_REG(i, 45), 0xff, pdram_timing->trp); in gen_rk3399_ctl_params_f0()
560 ((pdram_timing->trefi - 8) << 16) | in gen_rk3399_ctl_params_f0()
561 pdram_timing->trfc); in gen_rk3399_ctl_params_f0()
562 mmio_clrsetbits_32(CTL_REG(i, 52), 0xffff, pdram_timing->txp); in gen_rk3399_ctl_params_f0()
564 pdram_timing->txpdll << 16); in gen_rk3399_ctl_params_f0()
566 pdram_timing->tcscke << 24); in gen_rk3399_ctl_params_f0()
567 mmio_clrsetbits_32(CTL_REG(i, 55), 0xff, pdram_timing->tmrri); in gen_rk3399_ctl_params_f0()
569 (pdram_timing->tzqcke << 24) | in gen_rk3399_ctl_params_f0()
570 (pdram_timing->tmrwckel << 16) | in gen_rk3399_ctl_params_f0()
571 (pdram_timing->tckehcs << 8) | in gen_rk3399_ctl_params_f0()
572 pdram_timing->tckelcs); in gen_rk3399_ctl_params_f0()
573 mmio_clrsetbits_32(CTL_REG(i, 60), 0xffff, pdram_timing->txsnr); in gen_rk3399_ctl_params_f0()
575 (pdram_timing->tckehcmd << 24) | in gen_rk3399_ctl_params_f0()
576 (pdram_timing->tckelcmd << 16)); in gen_rk3399_ctl_params_f0()
578 (pdram_timing->tckelpd << 24) | in gen_rk3399_ctl_params_f0()
579 (pdram_timing->tescke << 16) | in gen_rk3399_ctl_params_f0()
580 (pdram_timing->tsr << 8) | in gen_rk3399_ctl_params_f0()
581 pdram_timing->tckckel); in gen_rk3399_ctl_params_f0()
583 (pdram_timing->tcmdcke << 8) | in gen_rk3399_ctl_params_f0()
584 pdram_timing->tcsckeh); in gen_rk3399_ctl_params_f0()
586 (pdram_timing->tcksrx << 16) | in gen_rk3399_ctl_params_f0()
587 (pdram_timing->tcksre << 8)); in gen_rk3399_ctl_params_f0()
591 (pdram_timing->tvrcg_enable << 16)); in gen_rk3399_ctl_params_f0()
592 mmio_write_32(CTL_REG(i, 123), (pdram_timing->tfc_long << 16) | in gen_rk3399_ctl_params_f0()
593 pdram_timing->tvrcg_disable); in gen_rk3399_ctl_params_f0()
595 (pdram_timing->tvref_long << 16) | in gen_rk3399_ctl_params_f0()
596 (pdram_timing->tckfspx << 8) | in gen_rk3399_ctl_params_f0()
597 pdram_timing->tckfspe); in gen_rk3399_ctl_params_f0()
598 mmio_write_32(CTL_REG(i, 133), (pdram_timing->mr[1] << 16) | in gen_rk3399_ctl_params_f0()
599 pdram_timing->mr[0]); in gen_rk3399_ctl_params_f0()
601 pdram_timing->mr[2]); in gen_rk3399_ctl_params_f0()
603 pdram_timing->mr[3]); in gen_rk3399_ctl_params_f0()
605 pdram_timing->mr11 << 24); in gen_rk3399_ctl_params_f0()
607 (pdram_timing->mr[1] << 16) | in gen_rk3399_ctl_params_f0()
608 pdram_timing->mr[0]); in gen_rk3399_ctl_params_f0()
610 pdram_timing->mr[2]); in gen_rk3399_ctl_params_f0()
612 pdram_timing->mr[3]); in gen_rk3399_ctl_params_f0()
614 pdram_timing->mr11 << 24); in gen_rk3399_ctl_params_f0()
617 pdram_timing->mr12 << 16); in gen_rk3399_ctl_params_f0()
619 pdram_timing->mr14 << 16); in gen_rk3399_ctl_params_f0()
621 pdram_timing->mr22 << 16); in gen_rk3399_ctl_params_f0()
623 pdram_timing->mr12 << 16); in gen_rk3399_ctl_params_f0()
625 pdram_timing->mr14 << 16); in gen_rk3399_ctl_params_f0()
627 pdram_timing->mr22 << 16); in gen_rk3399_ctl_params_f0()
630 pdram_timing->tzqinit << 8); in gen_rk3399_ctl_params_f0()
631 mmio_write_32(CTL_REG(i, 180), (pdram_timing->tzqcs << 16) | in gen_rk3399_ctl_params_f0()
632 (pdram_timing->tzqinit / 2)); in gen_rk3399_ctl_params_f0()
633 mmio_write_32(CTL_REG(i, 181), (pdram_timing->tzqlat << 16) | in gen_rk3399_ctl_params_f0()
634 pdram_timing->tzqcal); in gen_rk3399_ctl_params_f0()
636 pdram_timing->todton << 8); in gen_rk3399_ctl_params_f0()
651 (pdram_timing->tdqsck << 16) | in gen_rk3399_ctl_params_f0()
652 (pdram_timing->tdqsck_max << 8)); in gen_rk3399_ctl_params_f0()
654 (get_wrlat_adj(timing_config->dram_type, pdram_timing->cwl) in gen_rk3399_ctl_params_f0()
656 pdram_timing->cl); in gen_rk3399_ctl_params_f0()
659 (4 * pdram_timing->trefi) << 16); in gen_rk3399_ctl_params_f0()
662 (2 * pdram_timing->trefi) & 0xffff); in gen_rk3399_ctl_params_f0()
666 tmp = get_pi_wrlat(pdram_timing, timing_config); in gen_rk3399_ctl_params_f0()
667 tmp1 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_ctl_params_f0()
678 tmp = pdram_timing->cl + in gen_rk3399_ctl_params_f0()
679 get_pi_todtoff_min(pdram_timing, timing_config) - 1; in gen_rk3399_ctl_params_f0()
681 tmp1 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_ctl_params_f0()
684 tmp = pdram_timing->cl - pdram_timing->cwl; in gen_rk3399_ctl_params_f0()
690 (get_pi_tdfi_phy_rdlat(pdram_timing, in gen_rk3399_ctl_params_f0()
695 (2 * pdram_timing->trefi) & 0xffff); in gen_rk3399_ctl_params_f0()
698 (2 * pdram_timing->trefi) & 0xffff); in gen_rk3399_ctl_params_f0()
700 mmio_write_32(CTL_REG(i, 283), 20 * pdram_timing->trefi); in gen_rk3399_ctl_params_f0()
703 tmp1 = 20000 / (1000000 / pdram_timing->mhz) + 1; in gen_rk3399_ctl_params_f0()
704 if ((20000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_ctl_params_f0()
714 tmp1 = get_pi_wrlat_adj(pdram_timing, timing_config); in gen_rk3399_ctl_params_f0()
729 (pdram_timing->cl >= 5)) in gen_rk3399_ctl_params_f0()
730 tmp = pdram_timing->cl - 5; in gen_rk3399_ctl_params_f0()
732 tmp = pdram_timing->cl - 2; in gen_rk3399_ctl_params_f0()
739 struct dram_timing_t *pdram_timing) in gen_rk3399_ctl_params_f1() argument
748 tmp += pdram_timing->txsnr + (pdram_timing->tmrd * 3) + in gen_rk3399_ctl_params_f1()
749 pdram_timing->tmod + pdram_timing->tzqinit; in gen_rk3399_ctl_params_f1()
752 pdram_timing->tdllk << 16); in gen_rk3399_ctl_params_f1()
754 (pdram_timing->tmod << 24) | in gen_rk3399_ctl_params_f1()
755 (pdram_timing->tmrd << 16) | in gen_rk3399_ctl_params_f1()
756 (pdram_timing->trtp << 8)); in gen_rk3399_ctl_params_f1()
758 (pdram_timing->txsr - in gen_rk3399_ctl_params_f1()
759 pdram_timing->trcd) << 16); in gen_rk3399_ctl_params_f1()
761 mmio_write_32(CTL_REG(i, 9), pdram_timing->tinit1 + in gen_rk3399_ctl_params_f1()
762 pdram_timing->tinit3); in gen_rk3399_ctl_params_f1()
764 (pdram_timing->tmrd << 24) | in gen_rk3399_ctl_params_f1()
765 (pdram_timing->tmrd << 16) | in gen_rk3399_ctl_params_f1()
766 (pdram_timing->trtp << 8)); in gen_rk3399_ctl_params_f1()
768 pdram_timing->txsr << 16); in gen_rk3399_ctl_params_f1()
770 mmio_write_32(CTL_REG(i, 9), pdram_timing->tinit1); in gen_rk3399_ctl_params_f1()
771 mmio_write_32(CTL_REG(i, 11), pdram_timing->tinit4); in gen_rk3399_ctl_params_f1()
773 (pdram_timing->tmrd << 24) | in gen_rk3399_ctl_params_f1()
774 (pdram_timing->tmrd << 16) | in gen_rk3399_ctl_params_f1()
775 (pdram_timing->trtp << 8)); in gen_rk3399_ctl_params_f1()
777 pdram_timing->txsr << 16); in gen_rk3399_ctl_params_f1()
779 mmio_write_32(CTL_REG(i, 10), pdram_timing->tinit3); in gen_rk3399_ctl_params_f1()
780 mmio_write_32(CTL_REG(i, 12), pdram_timing->tinit5); in gen_rk3399_ctl_params_f1()
782 ((pdram_timing->cl * 2) << 8)); in gen_rk3399_ctl_params_f1()
784 (pdram_timing->cwl << 16)); in gen_rk3399_ctl_params_f1()
786 pdram_timing->al << 24); in gen_rk3399_ctl_params_f1()
788 (pdram_timing->tras_min << 24) | in gen_rk3399_ctl_params_f1()
789 (pdram_timing->trc << 16) | in gen_rk3399_ctl_params_f1()
790 (pdram_timing->trrd << 8)); in gen_rk3399_ctl_params_f1()
792 (pdram_timing->tfaw << 16) | in gen_rk3399_ctl_params_f1()
793 (pdram_timing->trppb << 8) | in gen_rk3399_ctl_params_f1()
794 pdram_timing->twtr); in gen_rk3399_ctl_params_f1()
795 mmio_write_32(CTL_REG(i, 35), (pdram_timing->tcke << 24) | in gen_rk3399_ctl_params_f1()
796 pdram_timing->tras_max); in gen_rk3399_ctl_params_f1()
798 max(1, pdram_timing->tckesr)); in gen_rk3399_ctl_params_f1()
800 (pdram_timing->trcd << 24)); in gen_rk3399_ctl_params_f1()
801 mmio_clrsetbits_32(CTL_REG(i, 40), 0x3f, pdram_timing->twr); in gen_rk3399_ctl_params_f1()
803 pdram_timing->tmrz << 24); in gen_rk3399_ctl_params_f1()
804 tmp = pdram_timing->tdal ? pdram_timing->tdal : in gen_rk3399_ctl_params_f1()
805 (pdram_timing->twr + pdram_timing->trp); in gen_rk3399_ctl_params_f1()
808 pdram_timing->trp << 8); in gen_rk3399_ctl_params_f1()
810 ((pdram_timing->trefi - 8) << 16) | in gen_rk3399_ctl_params_f1()
811 pdram_timing->trfc); in gen_rk3399_ctl_params_f1()
813 pdram_timing->txp << 16); in gen_rk3399_ctl_params_f1()
815 pdram_timing->txpdll); in gen_rk3399_ctl_params_f1()
817 pdram_timing->tmrri << 8); in gen_rk3399_ctl_params_f1()
818 mmio_write_32(CTL_REG(i, 57), (pdram_timing->tmrwckel << 24) | in gen_rk3399_ctl_params_f1()
819 (pdram_timing->tckehcs << 16) | in gen_rk3399_ctl_params_f1()
820 (pdram_timing->tckelcs << 8) | in gen_rk3399_ctl_params_f1()
821 pdram_timing->tcscke); in gen_rk3399_ctl_params_f1()
822 mmio_clrsetbits_32(CTL_REG(i, 58), 0xf, pdram_timing->tzqcke); in gen_rk3399_ctl_params_f1()
823 mmio_clrsetbits_32(CTL_REG(i, 61), 0xffff, pdram_timing->txsnr); in gen_rk3399_ctl_params_f1()
825 (pdram_timing->tckehcmd << 24) | in gen_rk3399_ctl_params_f1()
826 (pdram_timing->tckelcmd << 16)); in gen_rk3399_ctl_params_f1()
827 mmio_write_32(CTL_REG(i, 65), (pdram_timing->tckelpd << 24) | in gen_rk3399_ctl_params_f1()
828 (pdram_timing->tescke << 16) | in gen_rk3399_ctl_params_f1()
829 (pdram_timing->tsr << 8) | in gen_rk3399_ctl_params_f1()
830 pdram_timing->tckckel); in gen_rk3399_ctl_params_f1()
832 (pdram_timing->tcmdcke << 8) | in gen_rk3399_ctl_params_f1()
833 pdram_timing->tcsckeh); in gen_rk3399_ctl_params_f1()
835 (pdram_timing->tcksre << 24)); in gen_rk3399_ctl_params_f1()
837 pdram_timing->tcksrx); in gen_rk3399_ctl_params_f1()
841 (pdram_timing->tvrcg_disable << 16) | in gen_rk3399_ctl_params_f1()
842 pdram_timing->tvrcg_enable); in gen_rk3399_ctl_params_f1()
843 mmio_write_32(CTL_REG(i, 126), (pdram_timing->tckfspx << 24) | in gen_rk3399_ctl_params_f1()
844 (pdram_timing->tckfspe << 16) | in gen_rk3399_ctl_params_f1()
845 pdram_timing->tfc_long); in gen_rk3399_ctl_params_f1()
847 pdram_timing->tvref_long); in gen_rk3399_ctl_params_f1()
849 pdram_timing->mr[0] << 16); in gen_rk3399_ctl_params_f1()
850 mmio_write_32(CTL_REG(i, 135), (pdram_timing->mr[2] << 16) | in gen_rk3399_ctl_params_f1()
851 pdram_timing->mr[1]); in gen_rk3399_ctl_params_f1()
853 pdram_timing->mr[3] << 16); in gen_rk3399_ctl_params_f1()
854 mmio_clrsetbits_32(CTL_REG(i, 140), 0xff, pdram_timing->mr11); in gen_rk3399_ctl_params_f1()
856 pdram_timing->mr[0] << 16); in gen_rk3399_ctl_params_f1()
857 mmio_write_32(CTL_REG(i, 149), (pdram_timing->mr[2] << 16) | in gen_rk3399_ctl_params_f1()
858 pdram_timing->mr[1]); in gen_rk3399_ctl_params_f1()
860 pdram_timing->mr[3] << 16); in gen_rk3399_ctl_params_f1()
861 mmio_clrsetbits_32(CTL_REG(i, 154), 0xff, pdram_timing->mr11); in gen_rk3399_ctl_params_f1()
864 pdram_timing->mr12); in gen_rk3399_ctl_params_f1()
866 pdram_timing->mr14); in gen_rk3399_ctl_params_f1()
868 pdram_timing->mr22); in gen_rk3399_ctl_params_f1()
870 pdram_timing->mr12); in gen_rk3399_ctl_params_f1()
872 pdram_timing->mr14); in gen_rk3399_ctl_params_f1()
874 pdram_timing->mr22); in gen_rk3399_ctl_params_f1()
877 ((pdram_timing->tzqinit / 2) << 16) | in gen_rk3399_ctl_params_f1()
878 pdram_timing->tzqinit); in gen_rk3399_ctl_params_f1()
879 mmio_write_32(CTL_REG(i, 183), (pdram_timing->tzqcal << 16) | in gen_rk3399_ctl_params_f1()
880 pdram_timing->tzqcs); in gen_rk3399_ctl_params_f1()
881 mmio_clrsetbits_32(CTL_REG(i, 184), 0x3f, pdram_timing->tzqlat); in gen_rk3399_ctl_params_f1()
883 pdram_timing->tzqreset); in gen_rk3399_ctl_params_f1()
885 pdram_timing->todton << 16); in gen_rk3399_ctl_params_f1()
899 (pdram_timing->tdqsck_max << 24)); in gen_rk3399_ctl_params_f1()
900 mmio_clrsetbits_32(CTL_REG(i, 222), 0x3, pdram_timing->tdqsck); in gen_rk3399_ctl_params_f1()
903 pdram_timing->cwl) << 8) | in gen_rk3399_ctl_params_f1()
905 pdram_timing->cl)); in gen_rk3399_ctl_params_f1()
908 (4 * pdram_timing->trefi) & 0xffff); in gen_rk3399_ctl_params_f1()
911 ((2 * pdram_timing->trefi) & 0xffff) << 16); in gen_rk3399_ctl_params_f1()
915 tmp = get_pi_wrlat(pdram_timing, timing_config); in gen_rk3399_ctl_params_f1()
916 tmp1 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_ctl_params_f1()
927 tmp = pdram_timing->cl + in gen_rk3399_ctl_params_f1()
928 get_pi_todtoff_min(pdram_timing, timing_config); in gen_rk3399_ctl_params_f1()
931 tmp1 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_ctl_params_f1()
934 tmp = pdram_timing->cl - pdram_timing->cwl; in gen_rk3399_ctl_params_f1()
940 (get_pi_tdfi_phy_rdlat(pdram_timing, in gen_rk3399_ctl_params_f1()
945 ((2 * pdram_timing->trefi) & 0xffff) << 16); in gen_rk3399_ctl_params_f1()
948 (2 * pdram_timing->trefi) & 0xffff); in gen_rk3399_ctl_params_f1()
950 mmio_write_32(CTL_REG(i, 290), 20 * pdram_timing->trefi); in gen_rk3399_ctl_params_f1()
953 tmp1 = 20000 / (1000000 / pdram_timing->mhz) + 1; in gen_rk3399_ctl_params_f1()
954 if ((20000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_ctl_params_f1()
964 tmp1 = get_pi_wrlat_adj(pdram_timing, timing_config); in gen_rk3399_ctl_params_f1()
980 (pdram_timing->cl >= 5)) in gen_rk3399_ctl_params_f1()
981 tmp = pdram_timing->cl - 5; in gen_rk3399_ctl_params_f1()
983 tmp = pdram_timing->cl - 2; in gen_rk3399_ctl_params_f1()
1016 struct dram_timing_t *pdram_timing, in gen_rk3399_ctl_params() argument
1020 gen_rk3399_ctl_params_f0(timing_config, pdram_timing); in gen_rk3399_ctl_params()
1022 gen_rk3399_ctl_params_f1(timing_config, pdram_timing); in gen_rk3399_ctl_params()
1026 struct dram_timing_t *pdram_timing) in gen_rk3399_pi_params_f0() argument
1033 tmp = 4 * pdram_timing->trefi; in gen_rk3399_pi_params_f0()
1036 tmp = 2 * pdram_timing->trefi; in gen_rk3399_pi_params_f0()
1046 tmp = (pdram_timing->bl / 2) + 4 + in gen_rk3399_pi_params_f0()
1047 (get_pi_rdlat_adj(pdram_timing) - 2) + tmp + in gen_rk3399_pi_params_f0()
1048 get_pi_tdfi_phy_rdlat(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1052 tmp = get_pi_wrlat(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1061 (pdram_timing->cl * 2) << 16); in gen_rk3399_pi_params_f0()
1064 pdram_timing->trefi << 16); in gen_rk3399_pi_params_f0()
1066 mmio_clrsetbits_32(PI_REG(i, 46), 0x3ff, pdram_timing->trfc); in gen_rk3399_pi_params_f0()
1069 tmp = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1076 tmp1 = get_pi_wrlat(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1077 tmp2 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1090 tmp1 = pdram_timing->cl; in gen_rk3399_pi_params_f0()
1091 tmp1 += get_pi_todtoff_min(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1094 tmp2 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1100 tmp = pdram_timing->cl - pdram_timing->cwl; in gen_rk3399_pi_params_f0()
1104 tmp = get_pi_rdlat_adj(pdram_timing); in gen_rk3399_pi_params_f0()
1107 tmp = get_pi_wrlat_adj(pdram_timing, timing_config); in gen_rk3399_pi_params_f0()
1119 tmp1 = 20000 / (1000000 / pdram_timing->mhz) + 1; in gen_rk3399_pi_params_f0()
1120 if ((20000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_pi_params_f0()
1128 pdram_timing->tmrz << 8); in gen_rk3399_pi_params_f0()
1130 tmp1 = 2 * 1000 / (1000000 / pdram_timing->mhz); in gen_rk3399_pi_params_f0()
1131 if ((2 * 1000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_pi_params_f0()
1137 tmp = 10000 / (1000000 / pdram_timing->mhz); in gen_rk3399_pi_params_f0()
1138 if ((10000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_pi_params_f0()
1140 if (pdram_timing->mhz <= 100) in gen_rk3399_pi_params_f0()
1147 pdram_timing->mr[1] << 8); in gen_rk3399_pi_params_f0()
1149 mmio_clrsetbits_32(PI_REG(i, 133), 0xffff, pdram_timing->mr[1]); in gen_rk3399_pi_params_f0()
1152 pdram_timing->mr[1] << 16); in gen_rk3399_pi_params_f0()
1154 mmio_clrsetbits_32(PI_REG(i, 148), 0xffff, pdram_timing->mr[1]); in gen_rk3399_pi_params_f0()
1156 mmio_clrsetbits_32(PI_REG(i, 126), 0xffff, pdram_timing->mr[2]); in gen_rk3399_pi_params_f0()
1159 pdram_timing->mr[2] << 16); in gen_rk3399_pi_params_f0()
1161 mmio_clrsetbits_32(PI_REG(i, 141), 0xffff, pdram_timing->mr[2]); in gen_rk3399_pi_params_f0()
1164 pdram_timing->mr[2] << 16); in gen_rk3399_pi_params_f0()
1167 pdram_timing->tfc_long); in gen_rk3399_pi_params_f0()
1170 pdram_timing->twr << 24); in gen_rk3399_pi_params_f0()
1173 pdram_timing->twtr << 16); in gen_rk3399_pi_params_f0()
1176 pdram_timing->trcd << 8); in gen_rk3399_pi_params_f0()
1178 mmio_clrsetbits_32(PI_REG(i, 158), 0xff, pdram_timing->trp); in gen_rk3399_pi_params_f0()
1181 pdram_timing->trtp << 24); in gen_rk3399_pi_params_f0()
1184 pdram_timing->tras_min << 24); in gen_rk3399_pi_params_f0()
1186 tmp = pdram_timing->tras_max * 99 / 100; in gen_rk3399_pi_params_f0()
1190 pdram_timing->tmrd << 16); in gen_rk3399_pi_params_f0()
1193 pdram_timing->tdqsck_max); in gen_rk3399_pi_params_f0()
1196 (2 * pdram_timing->trefi) << 8); in gen_rk3399_pi_params_f0()
1199 20 * pdram_timing->trefi); in gen_rk3399_pi_params_f0()
1204 struct dram_timing_t *pdram_timing) in gen_rk3399_pi_params_f1() argument
1211 tmp = 4 * pdram_timing->trefi; in gen_rk3399_pi_params_f1()
1214 tmp = 2 * pdram_timing->trefi; in gen_rk3399_pi_params_f1()
1224 tmp = (pdram_timing->bl / 2) + 4 + in gen_rk3399_pi_params_f1()
1225 (get_pi_rdlat_adj(pdram_timing) - 2) + tmp + in gen_rk3399_pi_params_f1()
1226 get_pi_tdfi_phy_rdlat(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1230 tmp = get_pi_wrlat(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1238 (pdram_timing->cl * 2) << 8); in gen_rk3399_pi_params_f1()
1241 pdram_timing->trefi << 16); in gen_rk3399_pi_params_f1()
1243 mmio_clrsetbits_32(PI_REG(i, 47), 0x3ff, pdram_timing->trfc); in gen_rk3399_pi_params_f1()
1246 tmp = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1252 tmp1 = get_pi_wrlat(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1253 tmp2 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1266 tmp1 = pdram_timing->cl + in gen_rk3399_pi_params_f1()
1267 get_pi_todtoff_min(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1270 tmp2 = get_pi_todtoff_max(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1276 tmp = pdram_timing->cl - pdram_timing->cwl; in gen_rk3399_pi_params_f1()
1280 tmp = get_pi_rdlat_adj(pdram_timing); in gen_rk3399_pi_params_f1()
1283 tmp = get_pi_wrlat_adj(pdram_timing, timing_config); in gen_rk3399_pi_params_f1()
1296 tmp1 = 20000 / (1000000 / pdram_timing->mhz) + 1; in gen_rk3399_pi_params_f1()
1297 if ((20000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_pi_params_f1()
1305 mmio_clrsetbits_32(PI_REG(i, 103), 0x1f, pdram_timing->tmrz); in gen_rk3399_pi_params_f1()
1308 tmp1 = 2 * 1000 / (1000000 / pdram_timing->mhz); in gen_rk3399_pi_params_f1()
1309 if ((2 * 1000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_pi_params_f1()
1316 tmp = 10000 / (1000000 / pdram_timing->mhz); in gen_rk3399_pi_params_f1()
1317 if ((10000 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_pi_params_f1()
1319 if (pdram_timing->mhz <= 100) in gen_rk3399_pi_params_f1()
1326 mmio_clrsetbits_32(PI_REG(i, 128), 0xffff, pdram_timing->mr[1]); in gen_rk3399_pi_params_f1()
1329 pdram_timing->mr[1] << 8); in gen_rk3399_pi_params_f1()
1331 mmio_clrsetbits_32(PI_REG(i, 143), 0xffff, pdram_timing->mr[1]); in gen_rk3399_pi_params_f1()
1334 pdram_timing->mr[1] << 8); in gen_rk3399_pi_params_f1()
1337 pdram_timing->mr[2] << 16); in gen_rk3399_pi_params_f1()
1339 mmio_clrsetbits_32(PI_REG(i, 136), 0xffff, pdram_timing->mr[2]); in gen_rk3399_pi_params_f1()
1342 pdram_timing->mr[2] << 16); in gen_rk3399_pi_params_f1()
1344 mmio_clrsetbits_32(PI_REG(i, 151), 0xffff, pdram_timing->mr[2]); in gen_rk3399_pi_params_f1()
1347 pdram_timing->tfc_long << 16); in gen_rk3399_pi_params_f1()
1350 pdram_timing->twr << 8); in gen_rk3399_pi_params_f1()
1352 mmio_clrsetbits_32(PI_REG(i, 162), 0x3f, pdram_timing->twtr); in gen_rk3399_pi_params_f1()
1355 pdram_timing->trcd << 24); in gen_rk3399_pi_params_f1()
1358 pdram_timing->trp << 16); in gen_rk3399_pi_params_f1()
1361 pdram_timing->trtp << 8); in gen_rk3399_pi_params_f1()
1364 pdram_timing->tras_min << 24); in gen_rk3399_pi_params_f1()
1367 pdram_timing->tras_max * 99 / 100); in gen_rk3399_pi_params_f1()
1370 pdram_timing->tmrd << 16); in gen_rk3399_pi_params_f1()
1373 pdram_timing->tdqsck_max); in gen_rk3399_pi_params_f1()
1376 2 * pdram_timing->trefi); in gen_rk3399_pi_params_f1()
1379 20 * pdram_timing->trefi); in gen_rk3399_pi_params_f1()
1384 struct dram_timing_t *pdram_timing, in gen_rk3399_pi_params() argument
1388 gen_rk3399_pi_params_f0(timing_config, pdram_timing); in gen_rk3399_pi_params()
1390 gen_rk3399_pi_params_f1(timing_config, pdram_timing); in gen_rk3399_pi_params()
1502 struct dram_timing_t *pdram_timing, in gen_rk3399_phy_params() argument
1528 tmp = 2500 / (1000000 / pdram_timing->mhz) + 3; in gen_rk3399_phy_params()
1529 if ((2500 % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_phy_params()
1554 if (pdram_timing->mhz <= 400) in gen_rk3399_phy_params()
1556 else if (pdram_timing->mhz <= 800) in gen_rk3399_phy_params()
1558 else if (pdram_timing->mhz <= 1000) in gen_rk3399_phy_params()
1564 div = pdram_timing->mhz / (2 * 20); in gen_rk3399_phy_params()
1586 (1000000 / pdram_timing->mhz); in gen_rk3399_phy_params()
1606 tmp = rddqs_delay_ps / (1000000 / pdram_timing->mhz) + 2; in gen_rk3399_phy_params()
1612 cas_lat = pdram_timing->cl + PI_ADD_LATENCY; in gen_rk3399_phy_params()
1613 rddata_en_ie_dly = ie_enable / (1000000 / pdram_timing->mhz); in gen_rk3399_phy_params()
1614 if ((ie_enable % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_phy_params()
1617 tsel_adder = tsel_enable / (1000000 / pdram_timing->mhz); in gen_rk3399_phy_params()
1618 if ((tsel_enable % (1000000 / pdram_timing->mhz)) != 0) in gen_rk3399_phy_params()
1669 if (pdram_timing->mhz <= ENPER_CS_TRAINING_FREQ) { in gen_rk3399_phy_params()
1688 gen_rk3399_phy_dll_bypass(pdram_timing->mhz, i, fn, in gen_rk3399_phy_params()