32 	uint32_t val;  in tegra_pmc_cpu_on()  local
37 	val = tegra_pmc_read_32(PMC_PWRGATE_STATUS);  in tegra_pmc_cpu_on()
38 	if ((val & (1U << pmc_cpu_powergate_id[cpu])) == 0U) {  in tegra_pmc_cpu_on()
44 			val = tegra_pmc_read_32(PMC_PWRGATE_TOGGLE);  in tegra_pmc_cpu_on()
45 		} while ((val & PMC_TOGGLE_START) != 0U);  in tegra_pmc_cpu_on()
50 		val = pmc_cpu_powergate_id[cpu] | PMC_TOGGLE_START;  in tegra_pmc_cpu_on()
51 		tegra_pmc_write_32(PMC_PWRGATE_TOGGLE, val);  in tegra_pmc_cpu_on()
58 			val = tegra_pmc_read_32(PMC_PWRGATE_TOGGLE);  in tegra_pmc_cpu_on()
59 		} while ((val & (1U << 8)) != 0U);  in tegra_pmc_cpu_on()
63 			val = tegra_pmc_read_32(PMC_PWRGATE_STATUS);  in tegra_pmc_cpu_on()
64 		} while ((val & (1U << pmc_cpu_powergate_id[cpu])) == 0U);  in tegra_pmc_cpu_on()
73 	uint32_t val;  in tegra_pmc_cpu_setup()  local
77 	val = (uint32_t)(reset_addr >> 32U);  in tegra_pmc_cpu_setup()
78 	tegra_pmc_write_32(PMC_SECURE_SCRATCH35, val & 0x7FFU);  in tegra_pmc_cpu_setup()
86 	uint32_t val;  in tegra_pmc_lock_cpu_vectors()  local
89 	val = tegra_pmc_read_32(PMC_SECURE_DISABLE2);  in tegra_pmc_lock_cpu_vectors()
90 	val |= PMC_SECURE_DISABLE2_WRITE22_ON;  in tegra_pmc_lock_cpu_vectors()
91 	tegra_pmc_write_32(PMC_SECURE_DISABLE2, val);  in tegra_pmc_lock_cpu_vectors()
94 	val = tegra_pmc_read_32(PMC_SECURE_DISABLE3);  in tegra_pmc_lock_cpu_vectors()
95 	val |= (PMC_SECURE_DISABLE3_WRITE34_ON |  in tegra_pmc_lock_cpu_vectors()
97 	tegra_pmc_write_32(PMC_SECURE_DISABLE3, val);  in tegra_pmc_lock_cpu_vectors()
106 	uint32_t val = tegra_pmc_read_32(PMC_PWRGATE_STATUS);  in tegra_pmc_is_last_on_cpu()  local
117 		if ((val & ((uint32_t)1 << pmc_cpu_powergate_id[i])) != 0U) {  in tegra_pmc_is_last_on_cpu()