Lines Matching refs:pwrctrl
92 void __spm_src_req_update(const struct pwr_ctrl *pwrctrl, unsigned int resource_usage) in __spm_src_req_update() argument
96 1 : pwrctrl->reg_spm_apsrc_req; in __spm_src_req_update()
98 1 : pwrctrl->reg_spm_ddr_en_req; in __spm_src_req_update()
100 1 : pwrctrl->reg_spm_vrf18_req; in __spm_src_req_update()
102 1 : pwrctrl->reg_spm_infra_req; in __spm_src_req_update()
104 1 : pwrctrl->reg_spm_f26m_req; in __spm_src_req_update()
113 ((pwrctrl->reg_spm_dvfs_req & 0x1) << 8) | in __spm_src_req_update()
114 ((pwrctrl->reg_spm_sw_mailbox_req & 0x1) << 9) | in __spm_src_req_update()
115 ((pwrctrl->reg_spm_sspm_mailbox_req & 0x1) << 10) | in __spm_src_req_update()
116 ((pwrctrl->reg_spm_adsp_mailbox_req & 0x1) << 11) | in __spm_src_req_update()
117 ((pwrctrl->reg_spm_scp_mailbox_req & 0x1) << 12)); in __spm_src_req_update()
120 void __spm_set_power_control(const struct pwr_ctrl *pwrctrl) in __spm_set_power_control() argument
124 ((pwrctrl->reg_wfi_op & 0x1) << 0) | in __spm_set_power_control()
125 ((pwrctrl->reg_wfi_type & 0x1) << 1) | in __spm_set_power_control()
126 ((pwrctrl->reg_mp0_cputop_idle_mask & 0x1) << 2) | in __spm_set_power_control()
127 ((pwrctrl->reg_mp1_cputop_idle_mask & 0x1) << 3) | in __spm_set_power_control()
128 ((pwrctrl->reg_mcusys_idle_mask & 0x1) << 4) | in __spm_set_power_control()
129 ((pwrctrl->reg_md_apsrc_1_sel & 0x1) << 25) | in __spm_set_power_control()
130 ((pwrctrl->reg_md_apsrc_0_sel & 0x1) << 26) | in __spm_set_power_control()
131 ((pwrctrl->reg_conn_apsrc_sel & 0x1) << 29)); in __spm_set_power_control()
135 ((pwrctrl->reg_spm_apsrc_req & 0x1) << 0) | in __spm_set_power_control()
136 ((pwrctrl->reg_spm_f26m_req & 0x1) << 1) | in __spm_set_power_control()
137 ((pwrctrl->reg_spm_infra_req & 0x1) << 3) | in __spm_set_power_control()
138 ((pwrctrl->reg_spm_vrf18_req & 0x1) << 4) | in __spm_set_power_control()
139 ((pwrctrl->reg_spm_ddr_en_req & 0x1) << 7) | in __spm_set_power_control()
140 ((pwrctrl->reg_spm_dvfs_req & 0x1) << 8) | in __spm_set_power_control()
141 ((pwrctrl->reg_spm_sw_mailbox_req & 0x1) << 9) | in __spm_set_power_control()
142 ((pwrctrl->reg_spm_sspm_mailbox_req & 0x1) << 10) | in __spm_set_power_control()
143 ((pwrctrl->reg_spm_adsp_mailbox_req & 0x1) << 11) | in __spm_set_power_control()
144 ((pwrctrl->reg_spm_scp_mailbox_req & 0x1) << 12)); in __spm_set_power_control()
148 ((pwrctrl->reg_sspm_srcclkena_0_mask_b & 0x1) << 0) | in __spm_set_power_control()
149 ((pwrctrl->reg_sspm_infra_req_0_mask_b & 0x1) << 1) | in __spm_set_power_control()
150 ((pwrctrl->reg_sspm_apsrc_req_0_mask_b & 0x1) << 2) | in __spm_set_power_control()
151 ((pwrctrl->reg_sspm_vrf18_req_0_mask_b & 0x1) << 3) | in __spm_set_power_control()
152 ((pwrctrl->reg_sspm_ddr_en_0_mask_b & 0x1) << 4) | in __spm_set_power_control()
153 ((pwrctrl->reg_scp_srcclkena_mask_b & 0x1) << 5) | in __spm_set_power_control()
154 ((pwrctrl->reg_scp_infra_req_mask_b & 0x1) << 6) | in __spm_set_power_control()
155 ((pwrctrl->reg_scp_apsrc_req_mask_b & 0x1) << 7) | in __spm_set_power_control()
156 ((pwrctrl->reg_scp_vrf18_req_mask_b & 0x1) << 8) | in __spm_set_power_control()
157 ((pwrctrl->reg_scp_ddr_en_mask_b & 0x1) << 9) | in __spm_set_power_control()
158 ((pwrctrl->reg_audio_dsp_srcclkena_mask_b & 0x1) << 10) | in __spm_set_power_control()
159 ((pwrctrl->reg_audio_dsp_infra_req_mask_b & 0x1) << 11) | in __spm_set_power_control()
160 ((pwrctrl->reg_audio_dsp_apsrc_req_mask_b & 0x1) << 12) | in __spm_set_power_control()
161 ((pwrctrl->reg_audio_dsp_vrf18_req_mask_b & 0x1) << 13) | in __spm_set_power_control()
162 ((pwrctrl->reg_audio_dsp_ddr_en_mask_b & 0x1) << 14) | in __spm_set_power_control()
163 ((pwrctrl->reg_apu_srcclkena_mask_b & 0x1) << 15) | in __spm_set_power_control()
164 ((pwrctrl->reg_apu_infra_req_mask_b & 0x1) << 16) | in __spm_set_power_control()
165 ((pwrctrl->reg_apu_apsrc_req_mask_b & 0x1) << 17) | in __spm_set_power_control()
166 ((pwrctrl->reg_apu_vrf18_req_mask_b & 0x1) << 18) | in __spm_set_power_control()
167 ((pwrctrl->reg_apu_ddr_en_mask_b & 0x1) << 19) | in __spm_set_power_control()
168 ((pwrctrl->reg_cpueb_srcclkena_mask_b & 0x1) << 20) | in __spm_set_power_control()
169 ((pwrctrl->reg_cpueb_infra_req_mask_b & 0x1) << 21) | in __spm_set_power_control()
170 ((pwrctrl->reg_cpueb_apsrc_req_mask_b & 0x1) << 22) | in __spm_set_power_control()
171 ((pwrctrl->reg_cpueb_vrf18_req_mask_b & 0x1) << 23) | in __spm_set_power_control()
172 ((pwrctrl->reg_cpueb_ddr_en_mask_b & 0x1) << 24) | in __spm_set_power_control()
173 ((pwrctrl->reg_bak_psri_srcclkena_mask_b & 0x1) << 25) | in __spm_set_power_control()
174 ((pwrctrl->reg_bak_psri_infra_req_mask_b & 0x1) << 26) | in __spm_set_power_control()
175 ((pwrctrl->reg_bak_psri_apsrc_req_mask_b & 0x1) << 27) | in __spm_set_power_control()
176 ((pwrctrl->reg_bak_psri_vrf18_req_mask_b & 0x1) << 28) | in __spm_set_power_control()
177 ((pwrctrl->reg_bak_psri_ddr_en_mask_b & 0x1) << 29) | in __spm_set_power_control()
178 ((pwrctrl->reg_cam_ddren_req_mask_b & 0x1) << 30) | in __spm_set_power_control()
179 ((pwrctrl->reg_img_ddren_req_mask_b & 0x1) << 31)); in __spm_set_power_control()
183 ((pwrctrl->reg_msdc0_srcclkena_mask_b & 0x1) << 0) | in __spm_set_power_control()
184 ((pwrctrl->reg_msdc0_infra_req_mask_b & 0x1) << 1) | in __spm_set_power_control()
185 ((pwrctrl->reg_msdc0_apsrc_req_mask_b & 0x1) << 2) | in __spm_set_power_control()
186 ((pwrctrl->reg_msdc0_vrf18_req_mask_b & 0x1) << 3) | in __spm_set_power_control()
187 ((pwrctrl->reg_msdc0_ddr_en_mask_b & 0x1) << 4) | in __spm_set_power_control()
188 ((pwrctrl->reg_msdc1_srcclkena_mask_b & 0x1) << 5) | in __spm_set_power_control()
189 ((pwrctrl->reg_msdc1_infra_req_mask_b & 0x1) << 6) | in __spm_set_power_control()
190 ((pwrctrl->reg_msdc1_apsrc_req_mask_b & 0x1) << 7) | in __spm_set_power_control()
191 ((pwrctrl->reg_msdc1_vrf18_req_mask_b & 0x1) << 8) | in __spm_set_power_control()
192 ((pwrctrl->reg_msdc1_ddr_en_mask_b & 0x1) << 9) | in __spm_set_power_control()
193 ((pwrctrl->reg_msdc2_srcclkena_mask_b & 0x1) << 10) | in __spm_set_power_control()
194 ((pwrctrl->reg_msdc2_infra_req_mask_b & 0x1) << 11) | in __spm_set_power_control()
195 ((pwrctrl->reg_msdc2_apsrc_req_mask_b & 0x1) << 12) | in __spm_set_power_control()
196 ((pwrctrl->reg_msdc2_vrf18_req_mask_b & 0x1) << 13) | in __spm_set_power_control()
197 ((pwrctrl->reg_msdc2_ddr_en_mask_b & 0x1) << 14) | in __spm_set_power_control()
198 ((pwrctrl->reg_ufs_srcclkena_mask_b & 0x1) << 15) | in __spm_set_power_control()
199 ((pwrctrl->reg_ufs_infra_req_mask_b & 0x1) << 16) | in __spm_set_power_control()
200 ((pwrctrl->reg_ufs_apsrc_req_mask_b & 0x1) << 17) | in __spm_set_power_control()
201 ((pwrctrl->reg_ufs_vrf18_req_mask_b & 0x1) << 18) | in __spm_set_power_control()
202 ((pwrctrl->reg_ufs_ddr_en_mask_b & 0x1) << 19) | in __spm_set_power_control()
203 ((pwrctrl->reg_usb_srcclkena_mask_b & 0x1) << 20) | in __spm_set_power_control()
204 ((pwrctrl->reg_usb_infra_req_mask_b & 0x1) << 21) | in __spm_set_power_control()
205 ((pwrctrl->reg_usb_apsrc_req_mask_b & 0x1) << 22) | in __spm_set_power_control()
206 ((pwrctrl->reg_usb_vrf18_req_mask_b & 0x1) << 23) | in __spm_set_power_control()
207 ((pwrctrl->reg_usb_ddr_en_mask_b & 0x1) << 24) | in __spm_set_power_control()
208 ((pwrctrl->reg_pextp_p0_srcclkena_mask_b & 0x1) << 25) | in __spm_set_power_control()
209 ((pwrctrl->reg_pextp_p0_infra_req_mask_b & 0x1) << 26) | in __spm_set_power_control()
210 ((pwrctrl->reg_pextp_p0_apsrc_req_mask_b & 0x1) << 27) | in __spm_set_power_control()
211 ((pwrctrl->reg_pextp_p0_vrf18_req_mask_b & 0x1) << 28) | in __spm_set_power_control()
212 ((pwrctrl->reg_pextp_p0_ddr_en_mask_b & 0x1) << 29)); in __spm_set_power_control()
216 ((pwrctrl->reg_pextp_p1_srcclkena_mask_b & 0x1) << 0) | in __spm_set_power_control()
217 ((pwrctrl->reg_pextp_p1_infra_req_mask_b & 0x1) << 1) | in __spm_set_power_control()
218 ((pwrctrl->reg_pextp_p1_apsrc_req_mask_b & 0x1) << 2) | in __spm_set_power_control()
219 ((pwrctrl->reg_pextp_p1_vrf18_req_mask_b & 0x1) << 3) | in __spm_set_power_control()
220 ((pwrctrl->reg_pextp_p1_ddr_en_mask_b & 0x1) << 4) | in __spm_set_power_control()
221 ((pwrctrl->reg_gce0_infra_req_mask_b & 0x1) << 5) | in __spm_set_power_control()
222 ((pwrctrl->reg_gce0_apsrc_req_mask_b & 0x1) << 6) | in __spm_set_power_control()
223 ((pwrctrl->reg_gce0_vrf18_req_mask_b & 0x1) << 7) | in __spm_set_power_control()
224 ((pwrctrl->reg_gce0_ddr_en_mask_b & 0x1) << 8) | in __spm_set_power_control()
225 ((pwrctrl->reg_gce1_infra_req_mask_b & 0x1) << 9) | in __spm_set_power_control()
226 ((pwrctrl->reg_gce1_apsrc_req_mask_b & 0x1) << 10) | in __spm_set_power_control()
227 ((pwrctrl->reg_gce1_vrf18_req_mask_b & 0x1) << 11) | in __spm_set_power_control()
228 ((pwrctrl->reg_gce1_ddr_en_mask_b & 0x1) << 12) | in __spm_set_power_control()
229 ((pwrctrl->reg_spm_srcclkena_reserved_mask_b & 0x1) << 13) | in __spm_set_power_control()
230 ((pwrctrl->reg_spm_infra_req_reserved_mask_b & 0x1) << 14) | in __spm_set_power_control()
231 ((pwrctrl->reg_spm_apsrc_req_reserved_mask_b & 0x1) << 15) | in __spm_set_power_control()
232 ((pwrctrl->reg_spm_vrf18_req_reserved_mask_b & 0x1) << 16) | in __spm_set_power_control()
233 ((pwrctrl->reg_spm_ddr_en_reserved_mask_b & 0x1) << 17) | in __spm_set_power_control()
234 ((pwrctrl->reg_disp0_ddr_en_mask_b & 0x1) << 18) | in __spm_set_power_control()
235 ((pwrctrl->reg_disp0_ddr_en_mask_b & 0x1) << 19) | in __spm_set_power_control()
236 ((pwrctrl->reg_disp1_apsrc_req_mask_b & 0x1) << 20) | in __spm_set_power_control()
237 ((pwrctrl->reg_disp1_ddr_en_mask_b & 0x1) << 21) | in __spm_set_power_control()
238 ((pwrctrl->reg_disp2_apsrc_req_mask_b & 0x1) << 22) | in __spm_set_power_control()
239 ((pwrctrl->reg_disp2_ddr_en_mask_b & 0x1) << 23) | in __spm_set_power_control()
240 ((pwrctrl->reg_disp3_apsrc_req_mask_b & 0x1) << 24) | in __spm_set_power_control()
241 ((pwrctrl->reg_disp3_ddr_en_mask_b & 0x1) << 25) | in __spm_set_power_control()
242 ((pwrctrl->reg_infrasys_apsrc_req_mask_b & 0x1) << 26) | in __spm_set_power_control()
243 ((pwrctrl->reg_infrasys_ddr_en_mask_b & 0x1) << 27)); in __spm_set_power_control()
247 ((pwrctrl->reg_mcusys_merge_apsrc_req_mask_b & 0x1ff) << 0) | in __spm_set_power_control()
248 ((pwrctrl->reg_mcusys_merge_ddr_en_mask_b & 0x1ff) << 9) | in __spm_set_power_control()
249 ((pwrctrl->reg_dramc_md32_infra_req_mask_b & 0x3) << 18) | in __spm_set_power_control()
250 ((pwrctrl->reg_dramc_md32_vrf18_req_mask_b & 0x3) << 20) | in __spm_set_power_control()
251 ((pwrctrl->reg_dramc_md32_ddr_en_mask_b & 0x3) << 22) | in __spm_set_power_control()
252 ((pwrctrl->reg_dvfsrc_event_trigger_mask_b & 0x1) << 24)); in __spm_set_power_control()
256 ((pwrctrl->reg_wakeup_event_mask & 0xffffffff) << 0)); in __spm_set_power_control()
260 ((pwrctrl->reg_ext_wakeup_event_mask & 0xffffffff) << 0)); in __spm_set_power_control()
263 void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl) in __spm_set_wakeup_event() argument
272 if (pwrctrl->timer_val_cust == 0U) { in __spm_set_wakeup_event()
273 val = (pwrctrl->timer_val != 0U) ? pwrctrl->timer_val : PCM_TIMER_MAX; in __spm_set_wakeup_event()
275 val = pwrctrl->timer_val_cust; in __spm_set_wakeup_event()
282 if (pwrctrl->wake_src_cust == 0U) { in __spm_set_wakeup_event()
283 mask = pwrctrl->wake_src; in __spm_set_wakeup_event()
285 mask = pwrctrl->wake_src_cust; in __spm_set_wakeup_event()
299 void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl) in __spm_set_pcm_flags() argument
302 if (pwrctrl->pcm_flags_cust_clr != 0U) { in __spm_set_pcm_flags()
303 pwrctrl->pcm_flags &= ~pwrctrl->pcm_flags_cust_clr; in __spm_set_pcm_flags()
305 if (pwrctrl->pcm_flags_cust_set != 0U) { in __spm_set_pcm_flags()
306 pwrctrl->pcm_flags |= pwrctrl->pcm_flags_cust_set; in __spm_set_pcm_flags()
308 if (pwrctrl->pcm_flags1_cust_clr != 0U) { in __spm_set_pcm_flags()
309 pwrctrl->pcm_flags1 &= ~pwrctrl->pcm_flags1_cust_clr; in __spm_set_pcm_flags()
311 if (pwrctrl->pcm_flags1_cust_set != 0U) { in __spm_set_pcm_flags()
312 pwrctrl->pcm_flags1 |= pwrctrl->pcm_flags1_cust_set; in __spm_set_pcm_flags()
315 mmio_write_32(SPM_SW_FLAG_0, pwrctrl->pcm_flags); in __spm_set_pcm_flags()
317 mmio_write_32(SPM_SW_FLAG_1, pwrctrl->pcm_flags1); in __spm_set_pcm_flags()
319 mmio_write_32(SPM_SW_RSV_7, pwrctrl->pcm_flags); in __spm_set_pcm_flags()
321 mmio_write_32(SPM_SW_RSV_8, pwrctrl->pcm_flags1); in __spm_set_pcm_flags()