Lines Matching refs:BIT
11 #define MP_CPUSYS_TOP_ADB_DCM_REG0_MASK BIT(17)
12 #define MP_CPUSYS_TOP_ADB_DCM_REG1_MASK (BIT(15) | BIT(16) | BIT(17) | \
13 BIT(18) | BIT(21))
14 #define MP_CPUSYS_TOP_ADB_DCM_REG2_MASK (BIT(15) | BIT(16) | BIT(17) | BIT(18))
15 #define MP_CPUSYS_TOP_ADB_DCM_REG0_ON BIT(17)
16 #define MP_CPUSYS_TOP_ADB_DCM_REG1_ON (BIT(15) | BIT(16) | BIT(17) | \
17 BIT(18) | BIT(21))
18 #define MP_CPUSYS_TOP_ADB_DCM_REG2_ON (BIT(15) | BIT(16) | BIT(17) | BIT(18))
70 #define MP_CPUSYS_TOP_APB_DCM_REG0_MASK BIT(5)
71 #define MP_CPUSYS_TOP_APB_DCM_REG1_MASK BIT(8)
72 #define MP_CPUSYS_TOP_APB_DCM_REG2_MASK BIT(16)
73 #define MP_CPUSYS_TOP_APB_DCM_REG0_ON BIT(5)
74 #define MP_CPUSYS_TOP_APB_DCM_REG1_ON BIT(8)
75 #define MP_CPUSYS_TOP_APB_DCM_REG2_ON BIT(16)
124 #define MP_CPUSYS_TOP_BUS_PLL_DIV_DCM_REG0_MASK (BIT(11) | BIT(24) | BIT(25))
125 #define MP_CPUSYS_TOP_BUS_PLL_DIV_DCM_REG0_ON (BIT(11) | BIT(24) | BIT(25))
152 #define MP_CPUSYS_TOP_CORE_STALL_DCM_REG0_MASK BIT(0)
153 #define MP_CPUSYS_TOP_CORE_STALL_DCM_REG0_ON BIT(0)
204 #define MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_MASK (BIT(24) | BIT(25))
205 #define MP_CPUSYS_TOP_CPU_PLL_DIV_0_DCM_REG0_ON (BIT(24) | BIT(25))
230 #define MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_MASK (BIT(24) | BIT(25))
231 #define MP_CPUSYS_TOP_CPU_PLL_DIV_1_DCM_REG0_ON (BIT(24) | BIT(25))
256 #define MP_CPUSYS_TOP_FCM_STALL_DCM_REG0_MASK BIT(4)
257 #define MP_CPUSYS_TOP_FCM_STALL_DCM_REG0_ON BIT(4)
282 #define MP_CPUSYS_TOP_LAST_COR_IDLE_DCM_REG0_MASK BIT(31)
283 #define MP_CPUSYS_TOP_LAST_COR_IDLE_DCM_REG0_ON BIT(31)
308 #define MP_CPUSYS_TOP_MISC_DCM_REG0_MASK (BIT(1) | BIT(4))
309 #define MP_CPUSYS_TOP_MISC_DCM_REG0_ON (BIT(1) | BIT(4))
334 #define MP_CPUSYS_TOP_MP0_QDCM_REG0_MASK BIT(3)
335 #define MP_CPUSYS_TOP_MP0_QDCM_REG1_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
336 #define MP_CPUSYS_TOP_MP0_QDCM_REG0_ON BIT(3)
337 #define MP_CPUSYS_TOP_MP0_QDCM_REG1_ON (BIT(0) | BIT(1) | BIT(2) | BIT(3))
377 #define CPCCFG_REG_EMI_WFIFO_REG0_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
378 #define CPCCFG_REG_EMI_WFIFO_REG0_ON (BIT(0) | BIT(1) | BIT(2) | BIT(3))