Lines Matching refs:x
23 #define AGX5_PWRMGR_DSU_FWEN(x) ((x) & 0xf) argument
24 #define AGX5_PWRMGR_DSU_PGEN(x) ((x) & 0xf) argument
25 #define AGX5_PWRMGR_DSU_PGEN_OUT(x) ((x) & 0xf) argument
26 #define AGX5_PWRMGR_DSU_SINGLE_PACCEPT(x) ((x) & 0x1) argument
27 #define AGX5_PWRMGR_DSU_SINGLE_PDENY(x) (((x) & 0x1) << 1) argument
28 #define AGX5_PWRMGR_DSU_SINGLE_FSM_STATE(x) (((x) & 0xff) << 8) argument
29 #define AGX5_PWRMGR_DSU_SINGLE_PCH_DONE(x) (((x) & 0x1) << 31) argument
30 #define AGX5_PWRMGR_DSU_MULTI_PACTIVE_IN(x) ((x) & 0xff) argument
31 #define AGX5_PWRMGR_DSU_MULTI_PACCEPT(x) (((x) & 0xff) << 8) argument
32 #define AGX5_PWRMGR_DSU_MULTI_PDENY(x) (((x) & 0xff) << 16) argument
33 #define AGX5_PWRMGR_DSU_MULTI_PCH_DONE(x) (((x) & 0x1) << 31) argument
56 #define AGX5_PWRMGR_PSS_FWEN(x) ((x) & 0xff) argument
57 #define AGX5_PWRMGR_PSS_PGEN(x) ((x) & 0xff) argument
58 #define AGX5_PWRMGR_PSS_PGEN_OUT(x) ((x) & 0xff) argument
67 #define AGX5_PWRMGR_MPU_TRIGGER_PCH_DSU(x) ((x) & 0x1) argument
68 #define AGX5_PWRMGR_MPU_TRIGGER_PCH_CPU(x) (((x) & 0xf) << 1) argument
69 #define AGX5_PWRMGR_MPU_STATUS_PCH_CPU(x) (((x) & 0xf) << 1) argument
78 #define AGX5_PWRMGR_PSS_STAT_BUSY(x) (((x) & 0x000000FF) >> 0) argument