121 	sc_pm_get_clock_rate(ipc_handle, IMX_RES_UART, 2, &rate);  in lpuart32_serial_setbrg()
205 	err = sc_rm_get_partition(ipc_handle, &secure_part);  in imx8_partition_resources()
209 	err = sc_rm_partition_alloc(ipc_handle, &os_part, false, false,  in imx8_partition_resources()
214 	err = sc_rm_set_parent(ipc_handle, os_part, secure_part);  in imx8_partition_resources()
220 		err = sc_rm_set_resource_movable(ipc_handle,  in imx8_partition_resources()
228 	err = sc_rm_move_all(ipc_handle, secure_part, os_part, true, true);  in imx8_partition_resources()
234 		err = sc_rm_set_peripheral_permissions(ipc_handle,  in imx8_partition_resources()
247 		owned = sc_rm_is_memreg_owned(ipc_handle, mr);  in imx8_partition_resources()
249 			err = sc_rm_get_memreg_info(ipc_handle, mr, &start, &end);  in imx8_partition_resources()
257 				err = sc_rm_assign_memreg(ipc_handle, os_part, mr);  in imx8_partition_resources()
266 		err = sc_rm_get_memreg_info(ipc_handle, mr_record, &start, &end);  in imx8_partition_resources()
270 			err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end);  in imx8_partition_resources()
274 			err = sc_rm_assign_memreg(ipc_handle, os_part, mr);  in imx8_partition_resources()
281 			err = sc_rm_memreg_alloc(ipc_handle, &mr, start, BL31_BASE - 1);  in imx8_partition_resources()
285 			err = sc_rm_assign_memreg(ipc_handle, os_part, mr);  in imx8_partition_resources()
304 	if (sc_ipc_open(&ipc_handle, SC_IPC_BASE) != SC_ERR_NONE)  in bl31_early_platform_setup2()
308 	sc_pm_set_resource_power_mode(ipc_handle, IMX_RES_UART,  in bl31_early_platform_setup2()
311 	sc_pm_set_clock_rate(ipc_handle, IMX_RES_UART, 2, &rate);  in bl31_early_platform_setup2()
312 	sc_pm_clock_enable(ipc_handle, IMX_RES_UART, 2, true, false);  in bl31_early_platform_setup2()
315 	sc_pad_set(ipc_handle, IMX_PAD_UART_RX, UART_PAD_CTRL);  in bl31_early_platform_setup2()
316 	sc_pad_set(ipc_handle, IMX_PAD_UART_TX, UART_PAD_CTRL);  in bl31_early_platform_setup2()
325 	sc_pm_set_resource_power_mode(ipc_handle, SC_R_MU_1A, SC_PM_PW_MODE_ON);  in bl31_early_platform_setup2()
328 	sc_pm_set_resource_power_mode(ipc_handle, SC_R_GPT_0, SC_PM_PW_MODE_ON);  in bl31_early_platform_setup2()
329 	sc_pm_clock_enable(ipc_handle, SC_R_GPT_0, SC_PM_CLK_PER, true, 0);  in bl31_early_platform_setup2()