141 void dram_umctl2_init(struct dram_timing_info *timing)  in dram_umctl2_init()  argument
143 	struct dram_cfg_param *ddrc_cfg = timing->ddrc_cfg;  in dram_umctl2_init()
146 	for (i = 0U; i < timing->ddrc_cfg_num; i++) {  in dram_umctl2_init()
156 void dram_phy_init(struct dram_timing_info *timing)  in dram_phy_init()  argument
158 	struct dram_cfg_param *cfg = timing->ddrphy_cfg;  in dram_phy_init()
162 	cfg = timing->ddrphy_cfg;  in dram_phy_init()
163 	for (i = 0U; i < timing->ddrphy_cfg_num; i++) {  in dram_phy_init()
169 	cfg = timing->ddrphy_trained_csr;  in dram_phy_init()
170 	for (i = 0U; i < timing->ddrphy_trained_csr_num; i++) {  in dram_phy_init()
176 	cfg = timing->ddrphy_pie;  in dram_phy_init()
177 	for (i = 0U; i < timing->ddrphy_pie_num; i++) {  in dram_phy_init()