Lines Matching refs:TZC_REG_BASE
271 #define TZC_REG_BASE 0xE8A21000 macro
272 #define TZC_STAT0_REG (TZC_REG_BASE + 0x800)
273 #define TZC_EN0_REG (TZC_REG_BASE + 0x804)
274 #define TZC_DIS0_REG (TZC_REG_BASE + 0x808)
275 #define TZC_STAT1_REG (TZC_REG_BASE + 0x80C)
276 #define TZC_EN1_REG (TZC_REG_BASE + 0x810)
277 #define TZC_DIS1_REG (TZC_REG_BASE + 0x814)
278 #define TZC_STAT2_REG (TZC_REG_BASE + 0x818)
279 #define TZC_EN2_REG (TZC_REG_BASE + 0x81C)
280 #define TZC_DIS2_REG (TZC_REG_BASE + 0x820)
281 #define TZC_STAT3_REG (TZC_REG_BASE + 0x824)
282 #define TZC_EN3_REG (TZC_REG_BASE + 0x828)
283 #define TZC_DIS3_REG (TZC_REG_BASE + 0x82C)
284 #define TZC_STAT4_REG (TZC_REG_BASE + 0x830)
285 #define TZC_EN4_REG (TZC_REG_BASE + 0x834)
286 #define TZC_DIS4_REG (TZC_REG_BASE + 0x838)
287 #define TZC_STAT5_REG (TZC_REG_BASE + 0x83C)
288 #define TZC_EN5_REG (TZC_REG_BASE + 0x840)
289 #define TZC_DIS5_REG (TZC_REG_BASE + 0x844)
290 #define TZC_STAT6_REG (TZC_REG_BASE + 0x848)
291 #define TZC_EN6_REG (TZC_REG_BASE + 0x84C)
292 #define TZC_DIS6_REG (TZC_REG_BASE + 0x850)
293 #define TZC_STAT7_REG (TZC_REG_BASE + 0x854)
294 #define TZC_EN7_REG (TZC_REG_BASE + 0x858)
295 #define TZC_DIS7_REG (TZC_REG_BASE + 0x85C)
296 #define TZC_STAT8_REG (TZC_REG_BASE + 0x860)
297 #define TZC_EN8_REG (TZC_REG_BASE + 0x864)
298 #define TZC_DIS8_REG (TZC_REG_BASE + 0x868)