Lines Matching refs:data
30 #define BSTI_CMD(sb, op, pa, ra, ta, data) \ argument
33 (((ta) & 0x3) << 16) | (data))
45 #define UPDATE_POS_EDGE(data, set) ((data) | ((set) << 1)) argument
144 uint32_t data; in swreg_poll() local
148 data = mmio_read_32(BSTI_CONTROL_OFFSET); in swreg_poll()
149 if ((data & BSTI_CONTROL_BUSY) != BSTI_CONTROL_BUSY) in swreg_poll()
158 static int write_swreg_config(enum sw_reg reg_id, uint32_t addr, uint32_t data) in write_swreg_config() argument
163 cmd = BSTI_CMD(0x1, BSTI_WRITE, reg_id, addr, BSTI_COMMAND_TA, data); in write_swreg_config()
175 static int read_swreg_config(enum sw_reg reg_id, uint32_t addr, uint32_t *data) in read_swreg_config() argument
190 *data = mmio_read_32(BSTI_COMMAND_OFFSET); in read_swreg_config()
191 *data &= BSTI_REG_DATA_MASK; in read_swreg_config()
226 uint32_t data; in dump_swreg_firmware() local
233 ret = read_swreg_config(reg_id, addr, &data); in dump_swreg_firmware()
236 INFO("\t0x%x: 0x%04x\n", addr, data); in dump_swreg_firmware()
245 uint32_t data = IHOST_VDDC_DATA; in set_swreg() local
269 data = DDR_CORE_DATA; in set_swreg()
272 UPDATE_POS_EDGE(data, 1)); in set_swreg()
277 UPDATE_POS_EDGE(data, 0)); in set_swreg()
303 uint32_t data; in swreg_firmware_update() local
345 ret = read_swreg_config(reg_id, addr, &data); in swreg_firmware_update()
347 (data != FM_DATA[reg_id - 1][addr]))) { in swreg_firmware_update()
351 data, FM_DATA[reg_id - 1][addr]); in swreg_firmware_update()