Lines Matching refs:BIT

731 #define RCC_R0CIDCFGR_CFEN			BIT(0)
732 #define RCC_R0CIDCFGR_SEM_EN BIT(1)
739 #define RCC_R0SEMCR_SEM_MUTEX BIT(0)
744 #define RCC_R1CIDCFGR_CFEN BIT(0)
745 #define RCC_R1CIDCFGR_SEM_EN BIT(1)
752 #define RCC_R1SEMCR_SEM_MUTEX BIT(0)
757 #define RCC_R2CIDCFGR_CFEN BIT(0)
758 #define RCC_R2CIDCFGR_SEM_EN BIT(1)
765 #define RCC_R2SEMCR_SEM_MUTEX BIT(0)
770 #define RCC_R3CIDCFGR_CFEN BIT(0)
771 #define RCC_R3CIDCFGR_SEM_EN BIT(1)
778 #define RCC_R3SEMCR_SEM_MUTEX BIT(0)
783 #define RCC_R4CIDCFGR_CFEN BIT(0)
784 #define RCC_R4CIDCFGR_SEM_EN BIT(1)
791 #define RCC_R4SEMCR_SEM_MUTEX BIT(0)
796 #define RCC_R5CIDCFGR_CFEN BIT(0)
797 #define RCC_R5CIDCFGR_SEM_EN BIT(1)
804 #define RCC_R5SEMCR_SEM_MUTEX BIT(0)
809 #define RCC_R6CIDCFGR_CFEN BIT(0)
810 #define RCC_R6CIDCFGR_SEM_EN BIT(1)
817 #define RCC_R6SEMCR_SEM_MUTEX BIT(0)
822 #define RCC_R7CIDCFGR_CFEN BIT(0)
823 #define RCC_R7CIDCFGR_SEM_EN BIT(1)
830 #define RCC_R7SEMCR_SEM_MUTEX BIT(0)
835 #define RCC_R8CIDCFGR_CFEN BIT(0)
836 #define RCC_R8CIDCFGR_SEM_EN BIT(1)
843 #define RCC_R8SEMCR_SEM_MUTEX BIT(0)
848 #define RCC_R9CIDCFGR_CFEN BIT(0)
849 #define RCC_R9CIDCFGR_SEM_EN BIT(1)
856 #define RCC_R9SEMCR_SEM_MUTEX BIT(0)
861 #define RCC_R10CIDCFGR_CFEN BIT(0)
862 #define RCC_R10CIDCFGR_SEM_EN BIT(1)
869 #define RCC_R10SEMCR_SEM_MUTEX BIT(0)
874 #define RCC_R11CIDCFGR_CFEN BIT(0)
875 #define RCC_R11CIDCFGR_SEM_EN BIT(1)
882 #define RCC_R11SEMCR_SEM_MUTEX BIT(0)
887 #define RCC_R12CIDCFGR_CFEN BIT(0)
888 #define RCC_R12CIDCFGR_SEM_EN BIT(1)
895 #define RCC_R12SEMCR_SEM_MUTEX BIT(0)
900 #define RCC_R13CIDCFGR_CFEN BIT(0)
901 #define RCC_R13CIDCFGR_SEM_EN BIT(1)
908 #define RCC_R13SEMCR_SEM_MUTEX BIT(0)
913 #define RCC_R14CIDCFGR_CFEN BIT(0)
914 #define RCC_R14CIDCFGR_SEM_EN BIT(1)
921 #define RCC_R14SEMCR_SEM_MUTEX BIT(0)
926 #define RCC_R15CIDCFGR_CFEN BIT(0)
927 #define RCC_R15CIDCFGR_SEM_EN BIT(1)
934 #define RCC_R15SEMCR_SEM_MUTEX BIT(0)
939 #define RCC_R16CIDCFGR_CFEN BIT(0)
940 #define RCC_R16CIDCFGR_SEM_EN BIT(1)
947 #define RCC_R16SEMCR_SEM_MUTEX BIT(0)
952 #define RCC_R17CIDCFGR_CFEN BIT(0)
953 #define RCC_R17CIDCFGR_SEM_EN BIT(1)
960 #define RCC_R17SEMCR_SEM_MUTEX BIT(0)
965 #define RCC_R18CIDCFGR_CFEN BIT(0)
966 #define RCC_R18CIDCFGR_SEM_EN BIT(1)
973 #define RCC_R18SEMCR_SEM_MUTEX BIT(0)
978 #define RCC_R19CIDCFGR_CFEN BIT(0)
979 #define RCC_R19CIDCFGR_SEM_EN BIT(1)
986 #define RCC_R19SEMCR_SEM_MUTEX BIT(0)
991 #define RCC_R20CIDCFGR_CFEN BIT(0)
992 #define RCC_R20CIDCFGR_SEM_EN BIT(1)
999 #define RCC_R20SEMCR_SEM_MUTEX BIT(0)
1004 #define RCC_R21CIDCFGR_CFEN BIT(0)
1005 #define RCC_R21CIDCFGR_SEM_EN BIT(1)
1012 #define RCC_R21SEMCR_SEM_MUTEX BIT(0)
1017 #define RCC_R22CIDCFGR_CFEN BIT(0)
1018 #define RCC_R22CIDCFGR_SEM_EN BIT(1)
1025 #define RCC_R22SEMCR_SEM_MUTEX BIT(0)
1030 #define RCC_R23CIDCFGR_CFEN BIT(0)
1031 #define RCC_R23CIDCFGR_SEM_EN BIT(1)
1038 #define RCC_R23SEMCR_SEM_MUTEX BIT(0)
1043 #define RCC_R24CIDCFGR_CFEN BIT(0)
1044 #define RCC_R24CIDCFGR_SEM_EN BIT(1)
1051 #define RCC_R24SEMCR_SEM_MUTEX BIT(0)
1056 #define RCC_R25CIDCFGR_CFEN BIT(0)
1057 #define RCC_R25CIDCFGR_SEM_EN BIT(1)
1064 #define RCC_R25SEMCR_SEM_MUTEX BIT(0)
1069 #define RCC_R26CIDCFGR_CFEN BIT(0)
1070 #define RCC_R26CIDCFGR_SEM_EN BIT(1)
1077 #define RCC_R26SEMCR_SEM_MUTEX BIT(0)
1082 #define RCC_R27CIDCFGR_CFEN BIT(0)
1083 #define RCC_R27CIDCFGR_SEM_EN BIT(1)
1090 #define RCC_R27SEMCR_SEM_MUTEX BIT(0)
1095 #define RCC_R28CIDCFGR_CFEN BIT(0)
1096 #define RCC_R28CIDCFGR_SEM_EN BIT(1)
1103 #define RCC_R28SEMCR_SEM_MUTEX BIT(0)
1108 #define RCC_R29CIDCFGR_CFEN BIT(0)
1109 #define RCC_R29CIDCFGR_SEM_EN BIT(1)
1116 #define RCC_R29SEMCR_SEM_MUTEX BIT(0)
1121 #define RCC_R30CIDCFGR_CFEN BIT(0)
1122 #define RCC_R30CIDCFGR_SEM_EN BIT(1)
1129 #define RCC_R30SEMCR_SEM_MUTEX BIT(0)
1134 #define RCC_R31CIDCFGR_CFEN BIT(0)
1135 #define RCC_R31CIDCFGR_SEM_EN BIT(1)
1142 #define RCC_R31SEMCR_SEM_MUTEX BIT(0)
1147 #define RCC_R32CIDCFGR_CFEN BIT(0)
1148 #define RCC_R32CIDCFGR_SEM_EN BIT(1)
1155 #define RCC_R32SEMCR_SEM_MUTEX BIT(0)
1160 #define RCC_R33CIDCFGR_CFEN BIT(0)
1161 #define RCC_R33CIDCFGR_SEM_EN BIT(1)
1168 #define RCC_R33SEMCR_SEM_MUTEX BIT(0)
1173 #define RCC_R34CIDCFGR_CFEN BIT(0)
1174 #define RCC_R34CIDCFGR_SEM_EN BIT(1)
1181 #define RCC_R34SEMCR_SEM_MUTEX BIT(0)
1186 #define RCC_R35CIDCFGR_CFEN BIT(0)
1187 #define RCC_R35CIDCFGR_SEM_EN BIT(1)
1194 #define RCC_R35SEMCR_SEM_MUTEX BIT(0)
1199 #define RCC_R36CIDCFGR_CFEN BIT(0)
1200 #define RCC_R36CIDCFGR_SEM_EN BIT(1)
1207 #define RCC_R36SEMCR_SEM_MUTEX BIT(0)
1212 #define RCC_R37CIDCFGR_CFEN BIT(0)
1213 #define RCC_R37CIDCFGR_SEM_EN BIT(1)
1220 #define RCC_R37SEMCR_SEM_MUTEX BIT(0)
1225 #define RCC_R38CIDCFGR_CFEN BIT(0)
1226 #define RCC_R38CIDCFGR_SEM_EN BIT(1)
1233 #define RCC_R38SEMCR_SEM_MUTEX BIT(0)
1238 #define RCC_R39CIDCFGR_CFEN BIT(0)
1239 #define RCC_R39CIDCFGR_SEM_EN BIT(1)
1246 #define RCC_R39SEMCR_SEM_MUTEX BIT(0)
1251 #define RCC_R40CIDCFGR_CFEN BIT(0)
1252 #define RCC_R40CIDCFGR_SEM_EN BIT(1)
1259 #define RCC_R40SEMCR_SEM_MUTEX BIT(0)
1264 #define RCC_R41CIDCFGR_CFEN BIT(0)
1265 #define RCC_R41CIDCFGR_SEM_EN BIT(1)
1272 #define RCC_R41SEMCR_SEM_MUTEX BIT(0)
1277 #define RCC_R42CIDCFGR_CFEN BIT(0)
1278 #define RCC_R42CIDCFGR_SEM_EN BIT(1)
1285 #define RCC_R42SEMCR_SEM_MUTEX BIT(0)
1290 #define RCC_R43CIDCFGR_CFEN BIT(0)
1291 #define RCC_R43CIDCFGR_SEM_EN BIT(1)
1298 #define RCC_R43SEMCR_SEM_MUTEX BIT(0)
1303 #define RCC_R44CIDCFGR_CFEN BIT(0)
1304 #define RCC_R44CIDCFGR_SEM_EN BIT(1)
1311 #define RCC_R44SEMCR_SEM_MUTEX BIT(0)
1316 #define RCC_R45CIDCFGR_CFEN BIT(0)
1317 #define RCC_R45CIDCFGR_SEM_EN BIT(1)
1324 #define RCC_R45SEMCR_SEM_MUTEX BIT(0)
1329 #define RCC_R46CIDCFGR_CFEN BIT(0)
1330 #define RCC_R46CIDCFGR_SEM_EN BIT(1)
1337 #define RCC_R46SEMCR_SEM_MUTEX BIT(0)
1342 #define RCC_R47CIDCFGR_CFEN BIT(0)
1343 #define RCC_R47CIDCFGR_SEM_EN BIT(1)
1350 #define RCC_R47SEMCR_SEM_MUTEX BIT(0)
1355 #define RCC_R48CIDCFGR_CFEN BIT(0)
1356 #define RCC_R48CIDCFGR_SEM_EN BIT(1)
1363 #define RCC_R48SEMCR_SEM_MUTEX BIT(0)
1368 #define RCC_R49CIDCFGR_CFEN BIT(0)
1369 #define RCC_R49CIDCFGR_SEM_EN BIT(1)
1376 #define RCC_R49SEMCR_SEM_MUTEX BIT(0)
1381 #define RCC_R50CIDCFGR_CFEN BIT(0)
1382 #define RCC_R50CIDCFGR_SEM_EN BIT(1)
1389 #define RCC_R50SEMCR_SEM_MUTEX BIT(0)
1394 #define RCC_R51CIDCFGR_CFEN BIT(0)
1395 #define RCC_R51CIDCFGR_SEM_EN BIT(1)
1402 #define RCC_R51SEMCR_SEM_MUTEX BIT(0)
1407 #define RCC_R52CIDCFGR_CFEN BIT(0)
1408 #define RCC_R52CIDCFGR_SEM_EN BIT(1)
1415 #define RCC_R52SEMCR_SEM_MUTEX BIT(0)
1420 #define RCC_R53CIDCFGR_CFEN BIT(0)
1421 #define RCC_R53CIDCFGR_SEM_EN BIT(1)
1428 #define RCC_R53SEMCR_SEM_MUTEX BIT(0)
1433 #define RCC_R54CIDCFGR_CFEN BIT(0)
1434 #define RCC_R54CIDCFGR_SEM_EN BIT(1)
1441 #define RCC_R54SEMCR_SEM_MUTEX BIT(0)
1446 #define RCC_R55CIDCFGR_CFEN BIT(0)
1447 #define RCC_R55CIDCFGR_SEM_EN BIT(1)
1454 #define RCC_R55SEMCR_SEM_MUTEX BIT(0)
1459 #define RCC_R56CIDCFGR_CFEN BIT(0)
1460 #define RCC_R56CIDCFGR_SEM_EN BIT(1)
1467 #define RCC_R56SEMCR_SEM_MUTEX BIT(0)
1472 #define RCC_R57CIDCFGR_CFEN BIT(0)
1473 #define RCC_R57CIDCFGR_SEM_EN BIT(1)
1480 #define RCC_R57SEMCR_SEM_MUTEX BIT(0)
1485 #define RCC_R58CIDCFGR_CFEN BIT(0)
1486 #define RCC_R58CIDCFGR_SEM_EN BIT(1)
1493 #define RCC_R58SEMCR_SEM_MUTEX BIT(0)
1498 #define RCC_R59CIDCFGR_CFEN BIT(0)
1499 #define RCC_R59CIDCFGR_SEM_EN BIT(1)
1506 #define RCC_R59SEMCR_SEM_MUTEX BIT(0)
1511 #define RCC_R60CIDCFGR_CFEN BIT(0)
1512 #define RCC_R60CIDCFGR_SEM_EN BIT(1)
1519 #define RCC_R60SEMCR_SEM_MUTEX BIT(0)
1524 #define RCC_R61CIDCFGR_CFEN BIT(0)
1525 #define RCC_R61CIDCFGR_SEM_EN BIT(1)
1532 #define RCC_R61SEMCR_SEM_MUTEX BIT(0)
1537 #define RCC_R62CIDCFGR_CFEN BIT(0)
1538 #define RCC_R62CIDCFGR_SEM_EN BIT(1)
1545 #define RCC_R62SEMCR_SEM_MUTEX BIT(0)
1550 #define RCC_R63CIDCFGR_CFEN BIT(0)
1551 #define RCC_R63CIDCFGR_SEM_EN BIT(1)
1558 #define RCC_R63SEMCR_SEM_MUTEX BIT(0)
1563 #define RCC_R64CIDCFGR_CFEN BIT(0)
1564 #define RCC_R64CIDCFGR_SEM_EN BIT(1)
1571 #define RCC_R64SEMCR_SEM_MUTEX BIT(0)
1576 #define RCC_R65CIDCFGR_CFEN BIT(0)
1577 #define RCC_R65CIDCFGR_SEM_EN BIT(1)
1584 #define RCC_R65SEMCR_SEM_MUTEX BIT(0)
1589 #define RCC_R66CIDCFGR_CFEN BIT(0)
1590 #define RCC_R66CIDCFGR_SEM_EN BIT(1)
1597 #define RCC_R66SEMCR_SEM_MUTEX BIT(0)
1602 #define RCC_R67CIDCFGR_CFEN BIT(0)
1603 #define RCC_R67CIDCFGR_SEM_EN BIT(1)
1610 #define RCC_R67SEMCR_SEM_MUTEX BIT(0)
1615 #define RCC_R68CIDCFGR_CFEN BIT(0)
1616 #define RCC_R68CIDCFGR_SEM_EN BIT(1)
1623 #define RCC_R68SEMCR_SEM_MUTEX BIT(0)
1628 #define RCC_R69CIDCFGR_CFEN BIT(0)
1629 #define RCC_R69CIDCFGR_SEM_EN BIT(1)
1636 #define RCC_R69SEMCR_SEM_MUTEX BIT(0)
1641 #define RCC_R70CIDCFGR_CFEN BIT(0)
1642 #define RCC_R70CIDCFGR_SEM_EN BIT(1)
1649 #define RCC_R70SEMCR_SEM_MUTEX BIT(0)
1654 #define RCC_R71CIDCFGR_CFEN BIT(0)
1655 #define RCC_R71CIDCFGR_SEM_EN BIT(1)
1662 #define RCC_R71SEMCR_SEM_MUTEX BIT(0)
1667 #define RCC_R72CIDCFGR_CFEN BIT(0)
1668 #define RCC_R72CIDCFGR_SEM_EN BIT(1)
1675 #define RCC_R72SEMCR_SEM_MUTEX BIT(0)
1680 #define RCC_R73CIDCFGR_CFEN BIT(0)
1681 #define RCC_R73CIDCFGR_SEM_EN BIT(1)
1688 #define RCC_R73SEMCR_SEM_MUTEX BIT(0)
1693 #define RCC_R74CIDCFGR_CFEN BIT(0)
1694 #define RCC_R74CIDCFGR_SEM_EN BIT(1)
1701 #define RCC_R74SEMCR_SEM_MUTEX BIT(0)
1706 #define RCC_R75CIDCFGR_CFEN BIT(0)
1707 #define RCC_R75CIDCFGR_SEM_EN BIT(1)
1714 #define RCC_R75SEMCR_SEM_MUTEX BIT(0)
1719 #define RCC_R76CIDCFGR_CFEN BIT(0)
1720 #define RCC_R76CIDCFGR_SEM_EN BIT(1)
1727 #define RCC_R76SEMCR_SEM_MUTEX BIT(0)
1732 #define RCC_R77CIDCFGR_CFEN BIT(0)
1733 #define RCC_R77CIDCFGR_SEM_EN BIT(1)
1740 #define RCC_R77SEMCR_SEM_MUTEX BIT(0)
1745 #define RCC_R78CIDCFGR_CFEN BIT(0)
1746 #define RCC_R78CIDCFGR_SEM_EN BIT(1)
1753 #define RCC_R78SEMCR_SEM_MUTEX BIT(0)
1758 #define RCC_R79CIDCFGR_CFEN BIT(0)
1759 #define RCC_R79CIDCFGR_SEM_EN BIT(1)
1766 #define RCC_R79SEMCR_SEM_MUTEX BIT(0)
1771 #define RCC_R80CIDCFGR_CFEN BIT(0)
1772 #define RCC_R80CIDCFGR_SEM_EN BIT(1)
1779 #define RCC_R80SEMCR_SEM_MUTEX BIT(0)
1784 #define RCC_R81CIDCFGR_CFEN BIT(0)
1785 #define RCC_R81CIDCFGR_SEM_EN BIT(1)
1792 #define RCC_R81SEMCR_SEM_MUTEX BIT(0)
1797 #define RCC_R82CIDCFGR_CFEN BIT(0)
1798 #define RCC_R82CIDCFGR_SEM_EN BIT(1)
1805 #define RCC_R82SEMCR_SEM_MUTEX BIT(0)
1810 #define RCC_R83CIDCFGR_CFEN BIT(0)
1811 #define RCC_R83CIDCFGR_SEM_EN BIT(1)
1818 #define RCC_R83SEMCR_SEM_MUTEX BIT(0)
1823 #define RCC_R84CIDCFGR_CFEN BIT(0)
1824 #define RCC_R84CIDCFGR_SEM_EN BIT(1)
1831 #define RCC_R84SEMCR_SEM_MUTEX BIT(0)
1836 #define RCC_R85CIDCFGR_CFEN BIT(0)
1837 #define RCC_R85CIDCFGR_SEM_EN BIT(1)
1844 #define RCC_R85SEMCR_SEM_MUTEX BIT(0)
1849 #define RCC_R86CIDCFGR_CFEN BIT(0)
1850 #define RCC_R86CIDCFGR_SEM_EN BIT(1)
1857 #define RCC_R86SEMCR_SEM_MUTEX BIT(0)
1862 #define RCC_R87CIDCFGR_CFEN BIT(0)
1863 #define RCC_R87CIDCFGR_SEM_EN BIT(1)
1870 #define RCC_R87SEMCR_SEM_MUTEX BIT(0)
1875 #define RCC_R88CIDCFGR_CFEN BIT(0)
1876 #define RCC_R88CIDCFGR_SEM_EN BIT(1)
1883 #define RCC_R88SEMCR_SEM_MUTEX BIT(0)
1888 #define RCC_R89CIDCFGR_CFEN BIT(0)
1889 #define RCC_R89CIDCFGR_SEM_EN BIT(1)
1896 #define RCC_R89SEMCR_SEM_MUTEX BIT(0)
1901 #define RCC_R90CIDCFGR_CFEN BIT(0)
1902 #define RCC_R90CIDCFGR_SEM_EN BIT(1)
1909 #define RCC_R90SEMCR_SEM_MUTEX BIT(0)
1914 #define RCC_R91CIDCFGR_CFEN BIT(0)
1915 #define RCC_R91CIDCFGR_SEM_EN BIT(1)
1922 #define RCC_R91SEMCR_SEM_MUTEX BIT(0)
1927 #define RCC_R92CIDCFGR_CFEN BIT(0)
1928 #define RCC_R92CIDCFGR_SEM_EN BIT(1)
1935 #define RCC_R92SEMCR_SEM_MUTEX BIT(0)
1940 #define RCC_R93CIDCFGR_CFEN BIT(0)
1941 #define RCC_R93CIDCFGR_SEM_EN BIT(1)
1948 #define RCC_R93SEMCR_SEM_MUTEX BIT(0)
1953 #define RCC_R94CIDCFGR_CFEN BIT(0)
1954 #define RCC_R94CIDCFGR_SEM_EN BIT(1)
1961 #define RCC_R94SEMCR_SEM_MUTEX BIT(0)
1966 #define RCC_R95CIDCFGR_CFEN BIT(0)
1967 #define RCC_R95CIDCFGR_SEM_EN BIT(1)
1974 #define RCC_R95SEMCR_SEM_MUTEX BIT(0)
1979 #define RCC_R96CIDCFGR_CFEN BIT(0)
1980 #define RCC_R96CIDCFGR_SEM_EN BIT(1)
1987 #define RCC_R96SEMCR_SEM_MUTEX BIT(0)
1992 #define RCC_R97CIDCFGR_CFEN BIT(0)
1993 #define RCC_R97CIDCFGR_SEM_EN BIT(1)
2000 #define RCC_R97SEMCR_SEM_MUTEX BIT(0)
2005 #define RCC_R98CIDCFGR_CFEN BIT(0)
2006 #define RCC_R98CIDCFGR_SEM_EN BIT(1)
2013 #define RCC_R98SEMCR_SEM_MUTEX BIT(0)
2018 #define RCC_R99CIDCFGR_CFEN BIT(0)
2019 #define RCC_R99CIDCFGR_SEM_EN BIT(1)
2026 #define RCC_R99SEMCR_SEM_MUTEX BIT(0)
2031 #define RCC_R100CIDCFGR_CFEN BIT(0)
2032 #define RCC_R100CIDCFGR_SEM_EN BIT(1)
2039 #define RCC_R100SEMCR_SEM_MUTEX BIT(0)
2044 #define RCC_R101CIDCFGR_CFEN BIT(0)
2045 #define RCC_R101CIDCFGR_SEM_EN BIT(1)
2052 #define RCC_R101SEMCR_SEM_MUTEX BIT(0)
2057 #define RCC_R102CIDCFGR_CFEN BIT(0)
2058 #define RCC_R102CIDCFGR_SEM_EN BIT(1)
2065 #define RCC_R102SEMCR_SEM_MUTEX BIT(0)
2070 #define RCC_R103CIDCFGR_CFEN BIT(0)
2071 #define RCC_R103CIDCFGR_SEM_EN BIT(1)
2078 #define RCC_R103SEMCR_SEM_MUTEX BIT(0)
2083 #define RCC_R104CIDCFGR_CFEN BIT(0)
2084 #define RCC_R104CIDCFGR_SEM_EN BIT(1)
2091 #define RCC_R104SEMCR_SEM_MUTEX BIT(0)
2096 #define RCC_R105CIDCFGR_CFEN BIT(0)
2097 #define RCC_R105CIDCFGR_SEM_EN BIT(1)
2104 #define RCC_R105SEMCR_SEM_MUTEX BIT(0)
2109 #define RCC_R106CIDCFGR_CFEN BIT(0)
2110 #define RCC_R106CIDCFGR_SEM_EN BIT(1)
2117 #define RCC_R106SEMCR_SEM_MUTEX BIT(0)
2122 #define RCC_R107CIDCFGR_CFEN BIT(0)
2123 #define RCC_R107CIDCFGR_SEM_EN BIT(1)
2130 #define RCC_R107SEMCR_SEM_MUTEX BIT(0)
2135 #define RCC_R108CIDCFGR_CFEN BIT(0)
2136 #define RCC_R108CIDCFGR_SEM_EN BIT(1)
2143 #define RCC_R108SEMCR_SEM_MUTEX BIT(0)
2148 #define RCC_R109CIDCFGR_CFEN BIT(0)
2149 #define RCC_R109CIDCFGR_SEM_EN BIT(1)
2156 #define RCC_R109SEMCR_SEM_MUTEX BIT(0)
2161 #define RCC_R110CIDCFGR_CFEN BIT(0)
2162 #define RCC_R110CIDCFGR_SEM_EN BIT(1)
2169 #define RCC_R110SEMCR_SEM_MUTEX BIT(0)
2174 #define RCC_R111CIDCFGR_CFEN BIT(0)
2175 #define RCC_R111CIDCFGR_SEM_EN BIT(1)
2182 #define RCC_R111SEMCR_SEM_MUTEX BIT(0)
2187 #define RCC_R112CIDCFGR_CFEN BIT(0)
2188 #define RCC_R112CIDCFGR_SEM_EN BIT(1)
2195 #define RCC_R112SEMCR_SEM_MUTEX BIT(0)
2200 #define RCC_R113CIDCFGR_CFEN BIT(0)
2201 #define RCC_R113CIDCFGR_SEM_EN BIT(1)
2208 #define RCC_R113SEMCR_SEM_MUTEX BIT(0)
2213 #define RCC_RxCIDCFGR_CFEN BIT(0)
2214 #define RCC_RxCIDCFGR_SEM_EN BIT(1)
2221 #define RCC_RxSEMCR_SEM_MUTEX BIT(0)
2226 #define RCC_GRSTCSETR_SYSRST BIT(0)
2229 #define RCC_C1RSTCSETR_C1RST BIT(0)
2232 #define RCC_C1P1RSTCSETR_C1P1PORRST BIT(0)
2233 #define RCC_C1P1RSTCSETR_C1P1RST BIT(1)
2236 #define RCC_C2RSTCSETR_C2RST BIT(0)
2239 #define RCC_CxRSTCSETR_CxRST BIT(0)
2242 #define RCC_HWRSTSCLRR_PORRSTF BIT(0)
2243 #define RCC_HWRSTSCLRR_BORRSTF BIT(1)
2244 #define RCC_HWRSTSCLRR_PADRSTF BIT(2)
2245 #define RCC_HWRSTSCLRR_HCSSRSTF BIT(3)
2246 #define RCC_HWRSTSCLRR_VCORERSTF BIT(4)
2247 #define RCC_HWRSTSCLRR_SYSC1RSTF BIT(5)
2248 #define RCC_HWRSTSCLRR_SYSC2RSTF BIT(6)
2249 #define RCC_HWRSTSCLRR_IWDG1SYSRSTF BIT(7)
2250 #define RCC_HWRSTSCLRR_IWDG2SYSRSTF BIT(8)
2251 #define RCC_HWRSTSCLRR_IWDG3SYSRSTF BIT(9)
2252 #define RCC_HWRSTSCLRR_IWDG4SYSRSTF BIT(10)
2253 #define RCC_HWRSTSCLRR_IWDG5SYSRSTF BIT(11)
2254 #define RCC_HWRSTSCLRR_RETCRCERRRSTF BIT(12)
2255 #define RCC_HWRSTSCLRR_RETECCFAILCRCRSTF BIT(13)
2256 #define RCC_HWRSTSCLRR_RETECCFAILRESTRSTF BIT(14)
2259 #define RCC_C1HWRSTSCLRR_VCPURSTF BIT(0)
2260 #define RCC_C1HWRSTSCLRR_C1RSTF BIT(1)
2261 #define RCC_C1HWRSTSCLRR_C1P1RSTF BIT(2)
2264 #define RCC_C2HWRSTSCLRR_C2RSTF BIT(0)
2267 #define RCC_C1BOOTRSTSSETR_PORRSTF BIT(0)
2268 #define RCC_C1BOOTRSTSSETR_BORRSTF BIT(1)
2269 #define RCC_C1BOOTRSTSSETR_PADRSTF BIT(2)
2270 #define RCC_C1BOOTRSTSSETR_HCSSRSTF BIT(3)
2271 #define RCC_C1BOOTRSTSSETR_VCORERSTF BIT(4)
2272 #define RCC_C1BOOTRSTSSETR_VCPURSTF BIT(5)
2273 #define RCC_C1BOOTRSTSSETR_SYSC1RSTF BIT(6)
2274 #define RCC_C1BOOTRSTSSETR_SYSC2RSTF BIT(7)
2275 #define RCC_C1BOOTRSTSSETR_IWDG1SYSRSTF BIT(8)
2276 #define RCC_C1BOOTRSTSSETR_IWDG2SYSRSTF BIT(9)
2277 #define RCC_C1BOOTRSTSSETR_IWDG3SYSRSTF BIT(10)
2278 #define RCC_C1BOOTRSTSSETR_IWDG4SYSRSTF BIT(11)
2279 #define RCC_C1BOOTRSTSSETR_IWDG5SYSRSTF BIT(12)
2280 #define RCC_C1BOOTRSTSSETR_C1RSTF BIT(13)
2281 #define RCC_C1BOOTRSTSSETR_C1P1RSTF BIT(16)
2282 #define RCC_C1BOOTRSTSSETR_RETCRCERRRSTF BIT(17)
2283 #define RCC_C1BOOTRSTSSETR_RETECCFAILCRCRSTF BIT(18)
2284 #define RCC_C1BOOTRSTSSETR_RETECCFAILRESTRSTF BIT(19)
2285 #define RCC_C1BOOTRSTSSETR_STBYC1RSTF BIT(20)
2286 #define RCC_C1BOOTRSTSSETR_D1STBYRSTF BIT(22)
2287 #define RCC_C1BOOTRSTSSETR_D2STBYRSTF BIT(23)
2290 #define RCC_C1BOOTRSTSCLRR_PORRSTF BIT(0)
2291 #define RCC_C1BOOTRSTSCLRR_BORRSTF BIT(1)
2292 #define RCC_C1BOOTRSTSCLRR_PADRSTF BIT(2)
2293 #define RCC_C1BOOTRSTSCLRR_HCSSRSTF BIT(3)
2294 #define RCC_C1BOOTRSTSCLRR_VCORERSTF BIT(4)
2295 #define RCC_C1BOOTRSTSCLRR_VCPURSTF BIT(5)
2296 #define RCC_C1BOOTRSTSCLRR_SYSC1RSTF BIT(6)
2297 #define RCC_C1BOOTRSTSCLRR_SYSC2RSTF BIT(7)
2298 #define RCC_C1BOOTRSTSCLRR_IWDG1SYSRSTF BIT(8)
2299 #define RCC_C1BOOTRSTSCLRR_IWDG2SYSRSTF BIT(9)
2300 #define RCC_C1BOOTRSTSCLRR_IWDG3SYSRSTF BIT(10)
2301 #define RCC_C1BOOTRSTSCLRR_IWDG4SYSRSTF BIT(11)
2302 #define RCC_C1BOOTRSTSCLRR_IWDG5SYSRSTF BIT(12)
2303 #define RCC_C1BOOTRSTSCLRR_C1RSTF BIT(13)
2304 #define RCC_C1BOOTRSTSCLRR_C1P1RSTF BIT(16)
2305 #define RCC_C1BOOTRSTSCLRR_RETCRCERRRSTF BIT(17)
2306 #define RCC_C1BOOTRSTSCLRR_RETECCFAILCRCRSTF BIT(18)
2307 #define RCC_C1BOOTRSTSCLRR_RETECCFAILRESTRSTF BIT(19)
2308 #define RCC_C1BOOTRSTSCLRR_STBYC1RSTF BIT(20)
2309 #define RCC_C1BOOTRSTSCLRR_D1STBYRSTF BIT(22)
2310 #define RCC_C1BOOTRSTSCLRR_D2STBYRSTF BIT(23)
2313 #define RCC_C2BOOTRSTSSETR_PORRSTF BIT(0)
2314 #define RCC_C2BOOTRSTSSETR_BORRSTF BIT(1)
2315 #define RCC_C2BOOTRSTSSETR_PADRSTF BIT(2)
2316 #define RCC_C2BOOTRSTSSETR_HCSSRSTF BIT(3)
2317 #define RCC_C2BOOTRSTSSETR_VCORERSTF BIT(4)
2318 #define RCC_C2BOOTRSTSSETR_SYSC1RSTF BIT(6)
2319 #define RCC_C2BOOTRSTSSETR_SYSC2RSTF BIT(7)
2320 #define RCC_C2BOOTRSTSSETR_IWDG1SYSRSTF BIT(8)
2321 #define RCC_C2BOOTRSTSSETR_IWDG2SYSRSTF BIT(9)
2322 #define RCC_C2BOOTRSTSSETR_IWDG3SYSRSTF BIT(10)
2323 #define RCC_C2BOOTRSTSSETR_IWDG4SYSRSTF BIT(11)
2324 #define RCC_C2BOOTRSTSSETR_IWDG5SYSRSTF BIT(12)
2325 #define RCC_C2BOOTRSTSSETR_C2RSTF BIT(14)
2326 #define RCC_C2BOOTRSTSSETR_RETCRCERRRSTF BIT(17)
2327 #define RCC_C2BOOTRSTSSETR_RETECCFAILCRCRSTF BIT(18)
2328 #define RCC_C2BOOTRSTSSETR_RETECCFAILRESTRSTF BIT(19)
2329 #define RCC_C2BOOTRSTSSETR_STBYC2RSTF BIT(21)
2330 #define RCC_C2BOOTRSTSSETR_D2STBYRSTF BIT(23)
2333 #define RCC_C2BOOTRSTSCLRR_PORRSTF BIT(0)
2334 #define RCC_C2BOOTRSTSCLRR_BORRSTF BIT(1)
2335 #define RCC_C2BOOTRSTSCLRR_PADRSTF BIT(2)
2336 #define RCC_C2BOOTRSTSCLRR_HCSSRSTF BIT(3)
2337 #define RCC_C2BOOTRSTSCLRR_VCORERSTF BIT(4)
2338 #define RCC_C2BOOTRSTSCLRR_SYSC1RSTF BIT(6)
2339 #define RCC_C2BOOTRSTSCLRR_SYSC2RSTF BIT(7)
2340 #define RCC_C2BOOTRSTSCLRR_IWDG1SYSRSTF BIT(8)
2341 #define RCC_C2BOOTRSTSCLRR_IWDG2SYSRSTF BIT(9)
2342 #define RCC_C2BOOTRSTSCLRR_IWDG3SYSRSTF BIT(10)
2343 #define RCC_C2BOOTRSTSCLRR_IWDG4SYSRSTF BIT(11)
2344 #define RCC_C2BOOTRSTSCLRR_IWDG5SYSRSTF BIT(12)
2345 #define RCC_C2BOOTRSTSCLRR_C2RSTF BIT(14)
2346 #define RCC_C2BOOTRSTSCLRR_RETCRCERRRSTF BIT(17)
2347 #define RCC_C2BOOTRSTSCLRR_RETECCFAILCRCRSTF BIT(18)
2348 #define RCC_C2BOOTRSTSCLRR_RETECCFAILRESTRSTF BIT(19)
2349 #define RCC_C2BOOTRSTSCLRR_STBYC2RSTF BIT(21)
2350 #define RCC_C2BOOTRSTSCLRR_D2STBYRSTF BIT(23)
2353 #define RCC_C1SREQSETR_STPREQ_P0 BIT(0)
2354 #define RCC_C1SREQSETR_STPREQ_P1 BIT(1)
2355 #define RCC_C1SREQSETR_ESLPREQ BIT(16)
2358 #define RCC_C1SREQCLRR_STPREQ_P0 BIT(0)
2359 #define RCC_C1SREQCLRR_STPREQ_P1 BIT(1)
2360 #define RCC_C1SREQCLRR_ESLPREQ BIT(16)
2363 #define RCC_CPUBOOTCR_BOOT_CPU2 BIT(0)
2364 #define RCC_CPUBOOTCR_BOOT_CPU1 BIT(1)
2367 #define RCC_STBYBOOTCR_CPU_BEN_SEL BIT(1)
2368 #define RCC_STBYBOOTCR_COLD_CPU2 BIT(2)
2369 #define RCC_STBYBOOTCR_CPU2_HW_BEN BIT(4)
2370 #define RCC_STBYBOOTCR_CPU1_HW_BEN BIT(5)
2371 #define RCC_STBYBOOTCR_RET_CRCERR_RSTEN BIT(8)
2374 #define RCC_LEGBOOTCR_LEGACY_BEN BIT(0)
2377 #define RCC_BDCR_LSEON BIT(0)
2378 #define RCC_BDCR_LSEBYP BIT(1)
2379 #define RCC_BDCR_LSERDY BIT(2)
2380 #define RCC_BDCR_LSEDIGBYP BIT(3)
2383 #define RCC_BDCR_LSECSSON BIT(6)
2384 #define RCC_BDCR_LSEGFON BIT(7)
2385 #define RCC_BDCR_LSECSSD BIT(8)
2386 #define RCC_BDCR_LSION BIT(9)
2387 #define RCC_BDCR_LSIRDY BIT(10)
2390 #define RCC_BDCR_RTCCKEN BIT(20)
2391 #define RCC_BDCR_MSIFREQSEL BIT(24)
2392 #define RCC_BDCR_C3SYSTICKSEL BIT(25)
2393 #define RCC_BDCR_VSWRST BIT(31)
2404 #define RCC_D3DCR_CSION BIT(0)
2405 #define RCC_D3DCR_CSIKERON BIT(1)
2406 #define RCC_D3DCR_CSIRDY BIT(2)
2424 #define RCC_C1MSRDCR_C1MSRST BIT(8)
2429 #define RCC_PWRLPDLYCR_CPU2TMPSKP BIT(24)
2432 #define RCC_C1CIESETR_LSIRDYIE BIT(0)
2433 #define RCC_C1CIESETR_LSERDYIE BIT(1)
2434 #define RCC_C1CIESETR_HSIRDYIE BIT(2)
2435 #define RCC_C1CIESETR_HSERDYIE BIT(3)
2436 #define RCC_C1CIESETR_CSIRDYIE BIT(4)
2437 #define RCC_C1CIESETR_PLL1RDYIE BIT(5)
2438 #define RCC_C1CIESETR_PLL2RDYIE BIT(6)
2439 #define RCC_C1CIESETR_PLL3RDYIE BIT(7)
2440 #define RCC_C1CIESETR_PLL4RDYIE BIT(8)
2441 #define RCC_C1CIESETR_PLL5RDYIE BIT(9)
2442 #define RCC_C1CIESETR_PLL6RDYIE BIT(10)
2443 #define RCC_C1CIESETR_PLL7RDYIE BIT(11)
2444 #define RCC_C1CIESETR_PLL8RDYIE BIT(12)
2445 #define RCC_C1CIESETR_LSECSSIE BIT(16)
2446 #define RCC_C1CIESETR_WKUPIE BIT(20)
2449 #define RCC_C1CIFCLRR_LSIRDYF BIT(0)
2450 #define RCC_C1CIFCLRR_LSERDYF BIT(1)
2451 #define RCC_C1CIFCLRR_HSIRDYF BIT(2)
2452 #define RCC_C1CIFCLRR_HSERDYF BIT(3)
2453 #define RCC_C1CIFCLRR_CSIRDYF BIT(4)
2454 #define RCC_C1CIFCLRR_PLL1RDYF BIT(5)
2455 #define RCC_C1CIFCLRR_PLL2RDYF BIT(6)
2456 #define RCC_C1CIFCLRR_PLL3RDYF BIT(7)
2457 #define RCC_C1CIFCLRR_PLL4RDYF BIT(8)
2458 #define RCC_C1CIFCLRR_PLL5RDYF BIT(9)
2459 #define RCC_C1CIFCLRR_PLL6RDYF BIT(10)
2460 #define RCC_C1CIFCLRR_PLL7RDYF BIT(11)
2461 #define RCC_C1CIFCLRR_PLL8RDYF BIT(12)
2462 #define RCC_C1CIFCLRR_LSECSSF BIT(16)
2463 #define RCC_C1CIFCLRR_WKUPF BIT(20)
2466 #define RCC_C2CIESETR_LSIRDYIE BIT(0)
2467 #define RCC_C2CIESETR_LSERDYIE BIT(1)
2468 #define RCC_C2CIESETR_HSIRDYIE BIT(2)
2469 #define RCC_C2CIESETR_HSERDYIE BIT(3)
2470 #define RCC_C2CIESETR_CSIRDYIE BIT(4)
2471 #define RCC_C2CIESETR_PLL1RDYIE BIT(5)
2472 #define RCC_C2CIESETR_PLL2RDYIE BIT(6)
2473 #define RCC_C2CIESETR_PLL3RDYIE BIT(7)
2474 #define RCC_C2CIESETR_PLL4RDYIE BIT(8)
2475 #define RCC_C2CIESETR_PLL5RDYIE BIT(9)
2476 #define RCC_C2CIESETR_PLL6RDYIE BIT(10)
2477 #define RCC_C2CIESETR_PLL7RDYIE BIT(11)
2478 #define RCC_C2CIESETR_PLL8RDYIE BIT(12)
2479 #define RCC_C2CIESETR_LSECSSIE BIT(16)
2480 #define RCC_C2CIESETR_WKUPIE BIT(20)
2483 #define RCC_C2CIFCLRR_LSIRDYF BIT(0)
2484 #define RCC_C2CIFCLRR_LSERDYF BIT(1)
2485 #define RCC_C2CIFCLRR_HSIRDYF BIT(2)
2486 #define RCC_C2CIFCLRR_HSERDYF BIT(3)
2487 #define RCC_C2CIFCLRR_CSIRDYF BIT(4)
2488 #define RCC_C2CIFCLRR_PLL1RDYF BIT(5)
2489 #define RCC_C2CIFCLRR_PLL2RDYF BIT(6)
2490 #define RCC_C2CIFCLRR_PLL3RDYF BIT(7)
2491 #define RCC_C2CIFCLRR_PLL4RDYF BIT(8)
2492 #define RCC_C2CIFCLRR_PLL5RDYF BIT(9)
2493 #define RCC_C2CIFCLRR_PLL6RDYF BIT(10)
2494 #define RCC_C2CIFCLRR_PLL7RDYF BIT(11)
2495 #define RCC_C2CIFCLRR_PLL8RDYF BIT(12)
2496 #define RCC_C2CIFCLRR_LSECSSF BIT(16)
2497 #define RCC_C2CIFCLRR_WKUPF BIT(20)
2500 #define RCC_CxCIESETR_LSIRDYIE BIT(0)
2501 #define RCC_CxCIESETR_LSERDYIE BIT(1)
2502 #define RCC_CxCIESETR_HSIRDYIE BIT(2)
2503 #define RCC_CxCIESETR_HSERDYIE BIT(3)
2504 #define RCC_CxCIESETR_CSIRDYIE BIT(4)
2505 #define RCC_CxCIESETR_SHSIRDYIE BIT(5)
2506 #define RCC_CxCIESETR_PLL1RDYIE BIT(6)
2507 #define RCC_CxCIESETR_PLL2RDYIE BIT(7)
2508 #define RCC_CxCIESETR_PLL3RDYIE BIT(8)
2509 #define RCC_CxCIESETR_PLL4RDYIE BIT(9)
2510 #define RCC_CxCIESETR_PLL5RDYIE BIT(10)
2511 #define RCC_CxCIESETR_PLL6RDYIE BIT(11)
2512 #define RCC_CxCIESETR_PLL7RDYIE BIT(12)
2513 #define RCC_CxCIESETR_PLL8RDYIE BIT(13)
2514 #define RCC_CxCIESETR_LSECSSIE BIT(16)
2515 #define RCC_CxCIESETR_WKUPIE BIT(20)
2518 #define RCC_CxCIFCLRR_LSIRDYF BIT(0)
2519 #define RCC_CxCIFCLRR_LSERDYF BIT(1)
2520 #define RCC_CxCIFCLRR_HSIRDYF BIT(2)
2521 #define RCC_CxCIFCLRR_HSERDYF BIT(3)
2522 #define RCC_CxCIFCLRR_CSIRDYF BIT(4)
2523 #define RCC_CxCIFCLRR_SHSIRDYF BIT(5)
2524 #define RCC_CxCIFCLRR_PLL1RDYF BIT(6)
2525 #define RCC_CxCIFCLRR_PLL2RDYF BIT(7)
2526 #define RCC_CxCIFCLRR_PLL3RDYF BIT(8)
2527 #define RCC_CxCIFCLRR_PLL4RDYF BIT(9)
2528 #define RCC_CxCIFCLRR_PLL5RDYF BIT(10)
2529 #define RCC_CxCIFCLRR_PLL6RDYF BIT(11)
2530 #define RCC_CxCIFCLRR_PLL7RDYF BIT(12)
2531 #define RCC_CxCIFCLRR_PLL8RDYF BIT(13)
2532 #define RCC_CxCIFCLRR_LSECSSF BIT(16)
2533 #define RCC_CxCIFCLRR_WKUPF BIT(20)
2536 #define RCC_IWDGC1FZSETR_FZ_IWDG1 BIT(0)
2537 #define RCC_IWDGC1FZSETR_FZ_IWDG2 BIT(1)
2540 #define RCC_IWDGC1FZCLRR_FZ_IWDG1 BIT(0)
2541 #define RCC_IWDGC1FZCLRR_FZ_IWDG2 BIT(1)
2544 #define RCC_IWDGC1CFGSETR_IWDG1_SYSRSTEN BIT(0)
2545 #define RCC_IWDGC1CFGSETR_IWDG2_SYSRSTEN BIT(2)
2546 #define RCC_IWDGC1CFGSETR_IWDG2_KERRST BIT(18)
2549 #define RCC_IWDGC1CFGCLRR_IWDG1_SYSRSTEN BIT(0)
2550 #define RCC_IWDGC1CFGCLRR_IWDG2_SYSRSTEN BIT(2)
2551 #define RCC_IWDGC1CFGCLRR_IWDG2_KERRST BIT(18)
2554 #define RCC_IWDGC2FZSETR_FZ_IWDG3 BIT(0)
2555 #define RCC_IWDGC2FZSETR_FZ_IWDG4 BIT(1)
2558 #define RCC_IWDGC2FZCLRR_FZ_IWDG3 BIT(0)
2559 #define RCC_IWDGC2FZCLRR_FZ_IWDG4 BIT(1)
2562 #define RCC_IWDGC2CFGSETR_IWDG3_SYSRSTEN BIT(0)
2563 #define RCC_IWDGC2CFGSETR_IWDG4_SYSRSTEN BIT(2)
2564 #define RCC_IWDGC2CFGSETR_IWDG4_KERRST BIT(18)
2567 #define RCC_IWDGC2CFGCLRR_IWDG3_SYSRSTEN BIT(0)
2568 #define RCC_IWDGC2CFGCLRR_IWDG4_SYSRSTEN BIT(2)
2569 #define RCC_IWDGC2CFGCLRR_IWDG4_KERRST BIT(18)
2572 #define RCC_IWDGC3CFGSETR_IWDG5_SYSRSTEN BIT(0)
2575 #define RCC_IWDGC3CFGCLRR_IWDG5_SYSRSTEN BIT(0)
2578 #define RCC_C3CFGR_C3RST BIT(0)
2579 #define RCC_C3CFGR_C3EN BIT(1)
2580 #define RCC_C3CFGR_C3LPEN BIT(2)
2581 #define RCC_C3CFGR_C3AMEN BIT(3)
2582 #define RCC_C3CFGR_LPTIM3C3EN BIT(16)
2583 #define RCC_C3CFGR_LPTIM4C3EN BIT(17)
2584 #define RCC_C3CFGR_LPTIM5C3EN BIT(18)
2585 #define RCC_C3CFGR_SPI8C3EN BIT(19)
2586 #define RCC_C3CFGR_LPUART1C3EN BIT(20)
2587 #define RCC_C3CFGR_I2C8C3EN BIT(21)
2588 #define RCC_C3CFGR_ADF1C3EN BIT(23)
2589 #define RCC_C3CFGR_GPIOZC3EN BIT(24)
2590 #define RCC_C3CFGR_LPDMAC3EN BIT(25)
2591 #define RCC_C3CFGR_RTCC3EN BIT(26)
2592 #define RCC_C3CFGR_I3C4C3EN BIT(27)
2595 #define RCC_MCO1CFGR_MCO1SEL BIT(0)
2596 #define RCC_MCO1CFGR_MCO1ON BIT(8)
2599 #define RCC_MCO2CFGR_MCO2SEL BIT(0)
2600 #define RCC_MCO2CFGR_MCO2ON BIT(8)
2603 #define RCC_MCOxCFGR_MCOxSEL BIT(0)
2604 #define RCC_MCOxCFGR_MCOxON BIT(8)
2607 #define RCC_OCENSETR_HSION BIT(0)
2608 #define RCC_OCENSETR_HSIKERON BIT(1)
2609 #define RCC_OCENSETR_HSEDIV2ON BIT(5)
2610 #define RCC_OCENSETR_HSEDIV2BYP BIT(6)
2611 #define RCC_OCENSETR_HSEDIGBYP BIT(7)
2612 #define RCC_OCENSETR_HSEON BIT(8)
2613 #define RCC_OCENSETR_HSEKERON BIT(9)
2614 #define RCC_OCENSETR_HSEBYP BIT(10)
2615 #define RCC_OCENSETR_HSECSSON BIT(11)
2618 #define RCC_OCENCLRR_HSION BIT(0)
2619 #define RCC_OCENCLRR_HSIKERON BIT(1)
2620 #define RCC_OCENCLRR_HSEDIV2ON BIT(5)
2621 #define RCC_OCENCLRR_HSEDIV2BYP BIT(6)
2622 #define RCC_OCENCLRR_HSEDIGBYP BIT(7)
2623 #define RCC_OCENCLRR_HSEON BIT(8)
2624 #define RCC_OCENCLRR_HSEKERON BIT(9)
2625 #define RCC_OCENCLRR_HSEBYP BIT(10)
2628 #define RCC_OCRDYR_HSIRDY BIT(0)
2629 #define RCC_OCRDYR_HSERDY BIT(8)
2630 #define RCC_OCRDYR_CKREST BIT(25)
2654 #define RCC_APB1DIVR_APB1DIVRDY BIT(31)
2659 #define RCC_APB2DIVR_APB2DIVRDY BIT(31)
2664 #define RCC_APB3DIVR_APB3DIVRDY BIT(31)
2669 #define RCC_APB4DIVR_APB4DIVRDY BIT(31)
2674 #define RCC_APBDBGDIVR_APBDBGDIVRDY BIT(31)
2679 #define RCC_APBxDIVR_APBxDIVRDY BIT(31)
2682 #define RCC_TIMG1PRER_TIMG1PRE BIT(0)
2683 #define RCC_TIMG1PRER_TIMG1PRERDY BIT(31)
2686 #define RCC_TIMG2PRER_TIMG2PRE BIT(0)
2687 #define RCC_TIMG2PRER_TIMG2PRERDY BIT(31)
2690 #define RCC_TIMGxPRER_TIMGxPRE BIT(0)
2691 #define RCC_TIMGxPRER_TIMGxPRERDY BIT(31)
2694 #define RCC_LSMCUDIVR_LSMCUDIV BIT(0)
2695 #define RCC_LSMCUDIVR_LSMCUDIVRDY BIT(31)
2698 #define RCC_DDRCPCFGR_DDRCPRST BIT(0)
2699 #define RCC_DDRCPCFGR_DDRCPEN BIT(1)
2700 #define RCC_DDRCPCFGR_DDRCPLPEN BIT(2)
2703 #define RCC_DDRCAPBCFGR_DDRCAPBRST BIT(0)
2704 #define RCC_DDRCAPBCFGR_DDRCAPBEN BIT(1)
2705 #define RCC_DDRCAPBCFGR_DDRCAPBLPEN BIT(2)
2708 #define RCC_DDRPHYCAPBCFGR_DDRPHYCAPBRST BIT(0)
2709 #define RCC_DDRPHYCAPBCFGR_DDRPHYCAPBEN BIT(1)
2710 #define RCC_DDRPHYCAPBCFGR_DDRPHYCAPBLPEN BIT(2)
2713 #define RCC_DDRPHYCCFGR_DDRPHYCEN BIT(1)
2716 #define RCC_DDRCFGR_DDRCFGRST BIT(0)
2717 #define RCC_DDRCFGR_DDRCFGEN BIT(1)
2718 #define RCC_DDRCFGR_DDRCFGLPEN BIT(2)
2721 #define RCC_DDRITFCFGR_DDRRST BIT(0)
2724 #define RCC_DDRITFCFGR_DDRCKMOD_HSR BIT(5)
2725 #define RCC_DDRITFCFGR_DDRSHR BIT(8)
2726 #define RCC_DDRITFCFGR_DDRPHYDLP BIT(16)
2729 #define RCC_SYSRAMCFGR_SYSRAMEN BIT(1)
2730 #define RCC_SYSRAMCFGR_SYSRAMLPEN BIT(2)
2733 #define RCC_VDERAMCFGR_VDERAMEN BIT(1)
2734 #define RCC_VDERAMCFGR_VDERAMLPEN BIT(2)
2737 #define RCC_SRAM1CFGR_SRAM1EN BIT(1)
2738 #define RCC_SRAM1CFGR_SRAM1LPEN BIT(2)
2741 #define RCC_SRAM2CFGR_SRAM2EN BIT(1)
2742 #define RCC_SRAM2CFGR_SRAM2LPEN BIT(2)
2745 #define RCC_RETRAMCFGR_RETRAMEN BIT(1)
2746 #define RCC_RETRAMCFGR_RETRAMLPEN BIT(2)
2749 #define RCC_BKPSRAMCFGR_BKPSRAMEN BIT(1)
2750 #define RCC_BKPSRAMCFGR_BKPSRAMLPEN BIT(2)
2753 #define RCC_LPSRAM1CFGR_LPSRAM1EN BIT(1)
2754 #define RCC_LPSRAM1CFGR_LPSRAM1LPEN BIT(2)
2755 #define RCC_LPSRAM1CFGR_LPSRAM1AMEN BIT(3)
2758 #define RCC_LPSRAM2CFGR_LPSRAM2EN BIT(1)
2759 #define RCC_LPSRAM2CFGR_LPSRAM2LPEN BIT(2)
2760 #define RCC_LPSRAM2CFGR_LPSRAM2AMEN BIT(3)
2763 #define RCC_LPSRAM3CFGR_LPSRAM3EN BIT(1)
2764 #define RCC_LPSRAM3CFGR_LPSRAM3LPEN BIT(2)
2765 #define RCC_LPSRAM3CFGR_LPSRAM3AMEN BIT(3)
2768 #define RCC_OSPI1CFGR_OSPI1RST BIT(0)
2769 #define RCC_OSPI1CFGR_OSPI1EN BIT(1)
2770 #define RCC_OSPI1CFGR_OSPI1LPEN BIT(2)
2771 #define RCC_OSPI1CFGR_OTFDEC1RST BIT(8)
2772 #define RCC_OSPI1CFGR_OSPI1DLLRST BIT(16)
2775 #define RCC_OSPI2CFGR_OSPI2RST BIT(0)
2776 #define RCC_OSPI2CFGR_OSPI2EN BIT(1)
2777 #define RCC_OSPI2CFGR_OSPI2LPEN BIT(2)
2778 #define RCC_OSPI2CFGR_OTFDEC2RST BIT(8)
2779 #define RCC_OSPI2CFGR_OSPI2DLLRST BIT(16)
2782 #define RCC_OSPIxCFGR_OSPIxRST BIT(0)
2783 #define RCC_OSPIxCFGR_OSPIxEN BIT(1)
2784 #define RCC_OSPIxCFGR_OSPIxLPEN BIT(2)
2785 #define RCC_OSPIxCFGR_OTFDECxRST BIT(8)
2786 #define RCC_OSPIxCFGR_OSPIxDLLRST BIT(16)
2789 #define RCC_FMCCFGR_FMCRST BIT(0)
2790 #define RCC_FMCCFGR_FMCEN BIT(1)
2791 #define RCC_FMCCFGR_FMCLPEN BIT(2)
2794 #define RCC_DBGCFGR_DBGEN BIT(8)
2795 #define RCC_DBGCFGR_TRACEEN BIT(9)
2796 #define RCC_DBGCFGR_DBGRST BIT(12)
2799 #define RCC_STM500CFGR_STM500EN BIT(1)
2800 #define RCC_STM500CFGR_STM500LPEN BIT(2)
2803 #define RCC_ETRCFGR_ETREN BIT(1)
2804 #define RCC_ETRCFGR_ETRLPEN BIT(2)
2807 #define RCC_GPIOACFGR_GPIOARST BIT(0)
2808 #define RCC_GPIOACFGR_GPIOAEN BIT(1)
2809 #define RCC_GPIOACFGR_GPIOALPEN BIT(2)
2812 #define RCC_GPIOBCFGR_GPIOBRST BIT(0)
2813 #define RCC_GPIOBCFGR_GPIOBEN BIT(1)
2814 #define RCC_GPIOBCFGR_GPIOBLPEN BIT(2)
2817 #define RCC_GPIOCCFGR_GPIOCRST BIT(0)
2818 #define RCC_GPIOCCFGR_GPIOCEN BIT(1)
2819 #define RCC_GPIOCCFGR_GPIOCLPEN BIT(2)
2822 #define RCC_GPIODCFGR_GPIODRST BIT(0)
2823 #define RCC_GPIODCFGR_GPIODEN BIT(1)
2824 #define RCC_GPIODCFGR_GPIODLPEN BIT(2)
2827 #define RCC_GPIOECFGR_GPIOERST BIT(0)
2828 #define RCC_GPIOECFGR_GPIOEEN BIT(1)
2829 #define RCC_GPIOECFGR_GPIOELPEN BIT(2)
2832 #define RCC_GPIOFCFGR_GPIOFRST BIT(0)
2833 #define RCC_GPIOFCFGR_GPIOFEN BIT(1)
2834 #define RCC_GPIOFCFGR_GPIOFLPEN BIT(2)
2837 #define RCC_GPIOGCFGR_GPIOGRST BIT(0)
2838 #define RCC_GPIOGCFGR_GPIOGEN BIT(1)
2839 #define RCC_GPIOGCFGR_GPIOGLPEN BIT(2)
2842 #define RCC_GPIOHCFGR_GPIOHRST BIT(0)
2843 #define RCC_GPIOHCFGR_GPIOHEN BIT(1)
2844 #define RCC_GPIOHCFGR_GPIOHLPEN BIT(2)
2847 #define RCC_GPIOICFGR_GPIOIRST BIT(0)
2848 #define RCC_GPIOICFGR_GPIOIEN BIT(1)
2849 #define RCC_GPIOICFGR_GPIOILPEN BIT(2)
2852 #define RCC_GPIOJCFGR_GPIOJRST BIT(0)
2853 #define RCC_GPIOJCFGR_GPIOJEN BIT(1)
2854 #define RCC_GPIOJCFGR_GPIOJLPEN BIT(2)
2857 #define RCC_GPIOKCFGR_GPIOKRST BIT(0)
2858 #define RCC_GPIOKCFGR_GPIOKEN BIT(1)
2859 #define RCC_GPIOKCFGR_GPIOKLPEN BIT(2)
2862 #define RCC_GPIOZCFGR_GPIOZRST BIT(0)
2863 #define RCC_GPIOZCFGR_GPIOZEN BIT(1)
2864 #define RCC_GPIOZCFGR_GPIOZLPEN BIT(2)
2865 #define RCC_GPIOZCFGR_GPIOZAMEN BIT(3)
2868 #define RCC_GPIOxCFGR_GPIOxRST BIT(0)
2869 #define RCC_GPIOxCFGR_GPIOxEN BIT(1)
2870 #define RCC_GPIOxCFGR_GPIOxLPEN BIT(2)
2871 #define RCC_GPIOxCFGR_GPIOxAMEN BIT(3)
2874 #define RCC_HPDMA1CFGR_HPDMA1RST BIT(0)
2875 #define RCC_HPDMA1CFGR_HPDMA1EN BIT(1)
2876 #define RCC_HPDMA1CFGR_HPDMA1LPEN BIT(2)
2879 #define RCC_HPDMA2CFGR_HPDMA2RST BIT(0)
2880 #define RCC_HPDMA2CFGR_HPDMA2EN BIT(1)
2881 #define RCC_HPDMA2CFGR_HPDMA2LPEN BIT(2)
2884 #define RCC_HPDMA3CFGR_HPDMA3RST BIT(0)
2885 #define RCC_HPDMA3CFGR_HPDMA3EN BIT(1)
2886 #define RCC_HPDMA3CFGR_HPDMA3LPEN BIT(2)
2889 #define RCC_HPDMAxCFGR_HPDMAxRST BIT(0)
2890 #define RCC_HPDMAxCFGR_HPDMAxEN BIT(1)
2891 #define RCC_HPDMAxCFGR_HPDMAxLPEN BIT(2)
2894 #define RCC_LPDMACFGR_LPDMARST BIT(0)
2895 #define RCC_LPDMACFGR_LPDMAEN BIT(1)
2896 #define RCC_LPDMACFGR_LPDMALPEN BIT(2)
2897 #define RCC_LPDMACFGR_LPDMAAMEN BIT(3)
2900 #define RCC_HSEMCFGR_HSEMRST BIT(0)
2901 #define RCC_HSEMCFGR_HSEMEN BIT(1)
2902 #define RCC_HSEMCFGR_HSEMLPEN BIT(2)
2903 #define RCC_HSEMCFGR_HSEMAMEN BIT(3)
2906 #define RCC_IPCC1CFGR_IPCC1RST BIT(0)
2907 #define RCC_IPCC1CFGR_IPCC1EN BIT(1)
2908 #define RCC_IPCC1CFGR_IPCC1LPEN BIT(2)
2911 #define RCC_IPCC2CFGR_IPCC2RST BIT(0)
2912 #define RCC_IPCC2CFGR_IPCC2EN BIT(1)
2913 #define RCC_IPCC2CFGR_IPCC2LPEN BIT(2)
2914 #define RCC_IPCC2CFGR_IPCC2AMEN BIT(3)
2917 #define RCC_RTCCFGR_RTCEN BIT(1)
2918 #define RCC_RTCCFGR_RTCLPEN BIT(2)
2919 #define RCC_RTCCFGR_RTCAMEN BIT(3)
2922 #define RCC_SYSCPU1CFGR_SYSCPU1EN BIT(1)
2923 #define RCC_SYSCPU1CFGR_SYSCPU1LPEN BIT(2)
2926 #define RCC_BSECCFGR_BSECEN BIT(1)
2927 #define RCC_BSECCFGR_BSECLPEN BIT(2)
2930 #define RCC_IS2MCFGR_IS2MRST BIT(0)
2931 #define RCC_IS2MCFGR_IS2MEN BIT(1)
2932 #define RCC_IS2MCFGR_IS2MLPEN BIT(2)
2935 #define RCC_PLL2CFGR1_SSMODRST BIT(0)
2936 #define RCC_PLL2CFGR1_PLLEN BIT(8)
2937 #define RCC_PLL2CFGR1_PLLRDY BIT(24)
2938 #define RCC_PLL2CFGR1_CKREFST BIT(28)
2949 #define RCC_PLL2CFGR3_DOWNSPREAD BIT(24)
2950 #define RCC_PLL2CFGR3_DACEN BIT(25)
2951 #define RCC_PLL2CFGR3_SSCGDIS BIT(26)
2954 #define RCC_PLL2CFGR4_DSMEN BIT(8)
2955 #define RCC_PLL2CFGR4_FOUTPOSTDIVEN BIT(9)
2956 #define RCC_PLL2CFGR4_BYPASS BIT(10)
2973 #define RCC_PLL3CFGR1_SSMODRST BIT(0)
2974 #define RCC_PLL3CFGR1_PLLEN BIT(8)
2975 #define RCC_PLL3CFGR1_PLLRDY BIT(24)
2976 #define RCC_PLL3CFGR1_CKREFST BIT(28)
2987 #define RCC_PLL3CFGR3_DOWNSPREAD BIT(24)
2988 #define RCC_PLL3CFGR3_DACEN BIT(25)
2989 #define RCC_PLL3CFGR3_SSCGDIS BIT(26)
2992 #define RCC_PLL3CFGR4_DSMEN BIT(8)
2993 #define RCC_PLL3CFGR4_FOUTPOSTDIVEN BIT(9)
2994 #define RCC_PLL3CFGR4_BYPASS BIT(10)
3011 #define RCC_PLLxCFGR1_SSMODRST BIT(0)
3012 #define RCC_PLLxCFGR1_PLLEN BIT(8)
3013 #define RCC_PLLxCFGR1_PLLRDY BIT(24)
3014 #define RCC_PLLxCFGR1_CKREFST BIT(28)
3025 #define RCC_PLLxCFGR3_DOWNSPREAD BIT(24)
3026 #define RCC_PLLxCFGR3_DACEN BIT(25)
3027 #define RCC_PLLxCFGR3_SSCGDIS BIT(26)
3030 #define RCC_PLLxCFGR4_DSMEN BIT(8)
3031 #define RCC_PLLxCFGR4_FOUTPOSTDIVEN BIT(9)
3032 #define RCC_PLLxCFGR4_BYPASS BIT(10)
3051 #define RCC_HSIFMONCR_HSIMONEN BIT(15)
3054 #define RCC_HSIFMONCR_HSIMONIE BIT(30)
3055 #define RCC_HSIFMONCR_HSIMONF BIT(31)
3062 #define RCC_TIM1CFGR_TIM1RST BIT(0)
3063 #define RCC_TIM1CFGR_TIM1EN BIT(1)
3064 #define RCC_TIM1CFGR_TIM1LPEN BIT(2)
3067 #define RCC_TIM2CFGR_TIM2RST BIT(0)
3068 #define RCC_TIM2CFGR_TIM2EN BIT(1)
3069 #define RCC_TIM2CFGR_TIM2LPEN BIT(2)
3072 #define RCC_TIM3CFGR_TIM3RST BIT(0)
3073 #define RCC_TIM3CFGR_TIM3EN BIT(1)
3074 #define RCC_TIM3CFGR_TIM3LPEN BIT(2)
3077 #define RCC_TIM4CFGR_TIM4RST BIT(0)
3078 #define RCC_TIM4CFGR_TIM4EN BIT(1)
3079 #define RCC_TIM4CFGR_TIM4LPEN BIT(2)
3082 #define RCC_TIM5CFGR_TIM5RST BIT(0)
3083 #define RCC_TIM5CFGR_TIM5EN BIT(1)
3084 #define RCC_TIM5CFGR_TIM5LPEN BIT(2)
3087 #define RCC_TIM6CFGR_TIM6RST BIT(0)
3088 #define RCC_TIM6CFGR_TIM6EN BIT(1)
3089 #define RCC_TIM6CFGR_TIM6LPEN BIT(2)
3092 #define RCC_TIM7CFGR_TIM7RST BIT(0)
3093 #define RCC_TIM7CFGR_TIM7EN BIT(1)
3094 #define RCC_TIM7CFGR_TIM7LPEN BIT(2)
3097 #define RCC_TIM8CFGR_TIM8RST BIT(0)
3098 #define RCC_TIM8CFGR_TIM8EN BIT(1)
3099 #define RCC_TIM8CFGR_TIM8LPEN BIT(2)
3102 #define RCC_TIM10CFGR_TIM10RST BIT(0)
3103 #define RCC_TIM10CFGR_TIM10EN BIT(1)
3104 #define RCC_TIM10CFGR_TIM10LPEN BIT(2)
3107 #define RCC_TIM11CFGR_TIM11RST BIT(0)
3108 #define RCC_TIM11CFGR_TIM11EN BIT(1)
3109 #define RCC_TIM11CFGR_TIM11LPEN BIT(2)
3112 #define RCC_TIM12CFGR_TIM12RST BIT(0)
3113 #define RCC_TIM12CFGR_TIM12EN BIT(1)
3114 #define RCC_TIM12CFGR_TIM12LPEN BIT(2)
3117 #define RCC_TIM13CFGR_TIM13RST BIT(0)
3118 #define RCC_TIM13CFGR_TIM13EN BIT(1)
3119 #define RCC_TIM13CFGR_TIM13LPEN BIT(2)
3122 #define RCC_TIM14CFGR_TIM14RST BIT(0)
3123 #define RCC_TIM14CFGR_TIM14EN BIT(1)
3124 #define RCC_TIM14CFGR_TIM14LPEN BIT(2)
3127 #define RCC_TIM15CFGR_TIM15RST BIT(0)
3128 #define RCC_TIM15CFGR_TIM15EN BIT(1)
3129 #define RCC_TIM15CFGR_TIM15LPEN BIT(2)
3132 #define RCC_TIM16CFGR_TIM16RST BIT(0)
3133 #define RCC_TIM16CFGR_TIM16EN BIT(1)
3134 #define RCC_TIM16CFGR_TIM16LPEN BIT(2)
3137 #define RCC_TIM17CFGR_TIM17RST BIT(0)
3138 #define RCC_TIM17CFGR_TIM17EN BIT(1)
3139 #define RCC_TIM17CFGR_TIM17LPEN BIT(2)
3142 #define RCC_TIM20CFGR_TIM20RST BIT(0)
3143 #define RCC_TIM20CFGR_TIM20EN BIT(1)
3144 #define RCC_TIM20CFGR_TIM20LPEN BIT(2)
3147 #define RCC_LPTIM1CFGR_LPTIM1RST BIT(0)
3148 #define RCC_LPTIM1CFGR_LPTIM1EN BIT(1)
3149 #define RCC_LPTIM1CFGR_LPTIM1LPEN BIT(2)
3152 #define RCC_LPTIM2CFGR_LPTIM2RST BIT(0)
3153 #define RCC_LPTIM2CFGR_LPTIM2EN BIT(1)
3154 #define RCC_LPTIM2CFGR_LPTIM2LPEN BIT(2)
3157 #define RCC_LPTIM3CFGR_LPTIM3RST BIT(0)
3158 #define RCC_LPTIM3CFGR_LPTIM3EN BIT(1)
3159 #define RCC_LPTIM3CFGR_LPTIM3LPEN BIT(2)
3160 #define RCC_LPTIM3CFGR_LPTIM3AMEN BIT(3)
3163 #define RCC_LPTIM4CFGR_LPTIM4RST BIT(0)
3164 #define RCC_LPTIM4CFGR_LPTIM4EN BIT(1)
3165 #define RCC_LPTIM4CFGR_LPTIM4LPEN BIT(2)
3166 #define RCC_LPTIM4CFGR_LPTIM4AMEN BIT(3)
3169 #define RCC_LPTIM5CFGR_LPTIM5RST BIT(0)
3170 #define RCC_LPTIM5CFGR_LPTIM5EN BIT(1)
3171 #define RCC_LPTIM5CFGR_LPTIM5LPEN BIT(2)
3172 #define RCC_LPTIM5CFGR_LPTIM5AMEN BIT(3)
3175 #define RCC_LPTIMxCFGR_LPTIMxRST BIT(0)
3176 #define RCC_LPTIMxCFGR_LPTIMxEN BIT(1)
3177 #define RCC_LPTIMxCFGR_LPTIMxLPEN BIT(2)
3178 #define RCC_LPTIMxCFGR_LPTIMxAMEN BIT(3)
3181 #define RCC_SPI1CFGR_SPI1RST BIT(0)
3182 #define RCC_SPI1CFGR_SPI1EN BIT(1)
3183 #define RCC_SPI1CFGR_SPI1LPEN BIT(2)
3186 #define RCC_SPI2CFGR_SPI2RST BIT(0)
3187 #define RCC_SPI2CFGR_SPI2EN BIT(1)
3188 #define RCC_SPI2CFGR_SPI2LPEN BIT(2)
3191 #define RCC_SPI3CFGR_SPI3RST BIT(0)
3192 #define RCC_SPI3CFGR_SPI3EN BIT(1)
3193 #define RCC_SPI3CFGR_SPI3LPEN BIT(2)
3196 #define RCC_SPI4CFGR_SPI4RST BIT(0)
3197 #define RCC_SPI4CFGR_SPI4EN BIT(1)
3198 #define RCC_SPI4CFGR_SPI4LPEN BIT(2)
3201 #define RCC_SPI5CFGR_SPI5RST BIT(0)
3202 #define RCC_SPI5CFGR_SPI5EN BIT(1)
3203 #define RCC_SPI5CFGR_SPI5LPEN BIT(2)
3206 #define RCC_SPI6CFGR_SPI6RST BIT(0)
3207 #define RCC_SPI6CFGR_SPI6EN BIT(1)
3208 #define RCC_SPI6CFGR_SPI6LPEN BIT(2)
3211 #define RCC_SPI7CFGR_SPI7RST BIT(0)
3212 #define RCC_SPI7CFGR_SPI7EN BIT(1)
3213 #define RCC_SPI7CFGR_SPI7LPEN BIT(2)
3216 #define RCC_SPI8CFGR_SPI8RST BIT(0)
3217 #define RCC_SPI8CFGR_SPI8EN BIT(1)
3218 #define RCC_SPI8CFGR_SPI8LPEN BIT(2)
3219 #define RCC_SPI8CFGR_SPI8AMEN BIT(3)
3222 #define RCC_SPIxCFGR_SPIxRST BIT(0)
3223 #define RCC_SPIxCFGR_SPIxEN BIT(1)
3224 #define RCC_SPIxCFGR_SPIxLPEN BIT(2)
3225 #define RCC_SPIxCFGR_SPIxAMEN BIT(3)
3228 #define RCC_SPDIFRXCFGR_SPDIFRXRST BIT(0)
3229 #define RCC_SPDIFRXCFGR_SPDIFRXEN BIT(1)
3230 #define RCC_SPDIFRXCFGR_SPDIFRXLPEN BIT(2)
3233 #define RCC_USART1CFGR_USART1RST BIT(0)
3234 #define RCC_USART1CFGR_USART1EN BIT(1)
3235 #define RCC_USART1CFGR_USART1LPEN BIT(2)
3238 #define RCC_USART2CFGR_USART2RST BIT(0)
3239 #define RCC_USART2CFGR_USART2EN BIT(1)
3240 #define RCC_USART2CFGR_USART2LPEN BIT(2)
3243 #define RCC_USART3CFGR_USART3RST BIT(0)
3244 #define RCC_USART3CFGR_USART3EN BIT(1)
3245 #define RCC_USART3CFGR_USART3LPEN BIT(2)
3248 #define RCC_UART4CFGR_UART4RST BIT(0)
3249 #define RCC_UART4CFGR_UART4EN BIT(1)
3250 #define RCC_UART4CFGR_UART4LPEN BIT(2)
3253 #define RCC_UART5CFGR_UART5RST BIT(0)
3254 #define RCC_UART5CFGR_UART5EN BIT(1)
3255 #define RCC_UART5CFGR_UART5LPEN BIT(2)
3258 #define RCC_USART6CFGR_USART6RST BIT(0)
3259 #define RCC_USART6CFGR_USART6EN BIT(1)
3260 #define RCC_USART6CFGR_USART6LPEN BIT(2)
3263 #define RCC_UART7CFGR_UART7RST BIT(0)
3264 #define RCC_UART7CFGR_UART7EN BIT(1)
3265 #define RCC_UART7CFGR_UART7LPEN BIT(2)
3268 #define RCC_UART8CFGR_UART8RST BIT(0)
3269 #define RCC_UART8CFGR_UART8EN BIT(1)
3270 #define RCC_UART8CFGR_UART8LPEN BIT(2)
3273 #define RCC_UART9CFGR_UART9RST BIT(0)
3274 #define RCC_UART9CFGR_UART9EN BIT(1)
3275 #define RCC_UART9CFGR_UART9LPEN BIT(2)
3278 #define RCC_USARTxCFGR_USARTxRST BIT(0)
3279 #define RCC_USARTxCFGR_USARTxEN BIT(1)
3280 #define RCC_USARTxCFGR_USARTxLPEN BIT(2)
3283 #define RCC_UARTxCFGR_UARTxRST BIT(0)
3284 #define RCC_UARTxCFGR_UARTxEN BIT(1)
3285 #define RCC_UARTxCFGR_UARTxLPEN BIT(2)
3288 #define RCC_LPUART1CFGR_LPUART1RST BIT(0)
3289 #define RCC_LPUART1CFGR_LPUART1EN BIT(1)
3290 #define RCC_LPUART1CFGR_LPUART1LPEN BIT(2)
3291 #define RCC_LPUART1CFGR_LPUART1AMEN BIT(3)
3294 #define RCC_I2C1CFGR_I2C1RST BIT(0)
3295 #define RCC_I2C1CFGR_I2C1EN BIT(1)
3296 #define RCC_I2C1CFGR_I2C1LPEN BIT(2)
3299 #define RCC_I2C2CFGR_I2C2RST BIT(0)
3300 #define RCC_I2C2CFGR_I2C2EN BIT(1)
3301 #define RCC_I2C2CFGR_I2C2LPEN BIT(2)
3304 #define RCC_I2C3CFGR_I2C3RST BIT(0)
3305 #define RCC_I2C3CFGR_I2C3EN BIT(1)
3306 #define RCC_I2C3CFGR_I2C3LPEN BIT(2)
3309 #define RCC_I2C4CFGR_I2C4RST BIT(0)
3310 #define RCC_I2C4CFGR_I2C4EN BIT(1)
3311 #define RCC_I2C4CFGR_I2C4LPEN BIT(2)
3314 #define RCC_I2C5CFGR_I2C5RST BIT(0)
3315 #define RCC_I2C5CFGR_I2C5EN BIT(1)
3316 #define RCC_I2C5CFGR_I2C5LPEN BIT(2)
3319 #define RCC_I2C6CFGR_I2C6RST BIT(0)
3320 #define RCC_I2C6CFGR_I2C6EN BIT(1)
3321 #define RCC_I2C6CFGR_I2C6LPEN BIT(2)
3324 #define RCC_I2C7CFGR_I2C7RST BIT(0)
3325 #define RCC_I2C7CFGR_I2C7EN BIT(1)
3326 #define RCC_I2C7CFGR_I2C7LPEN BIT(2)
3329 #define RCC_I2C8CFGR_I2C8RST BIT(0)
3330 #define RCC_I2C8CFGR_I2C8EN BIT(1)
3331 #define RCC_I2C8CFGR_I2C8LPEN BIT(2)
3332 #define RCC_I2C8CFGR_I2C8AMEN BIT(3)
3335 #define RCC_I2CxCFGR_I2CxRST BIT(0)
3336 #define RCC_I2CxCFGR_I2CxEN BIT(1)
3337 #define RCC_I2CxCFGR_I2CxLPEN BIT(2)
3338 #define RCC_I2CxCFGR_I2CxAMEN BIT(3)
3341 #define RCC_SAI1CFGR_SAI1RST BIT(0)
3342 #define RCC_SAI1CFGR_SAI1EN BIT(1)
3343 #define RCC_SAI1CFGR_SAI1LPEN BIT(2)
3346 #define RCC_SAI2CFGR_SAI2RST BIT(0)
3347 #define RCC_SAI2CFGR_SAI2EN BIT(1)
3348 #define RCC_SAI2CFGR_SAI2LPEN BIT(2)
3351 #define RCC_SAI3CFGR_SAI3RST BIT(0)
3352 #define RCC_SAI3CFGR_SAI3EN BIT(1)
3353 #define RCC_SAI3CFGR_SAI3LPEN BIT(2)
3356 #define RCC_SAI4CFGR_SAI4RST BIT(0)
3357 #define RCC_SAI4CFGR_SAI4EN BIT(1)
3358 #define RCC_SAI4CFGR_SAI4LPEN BIT(2)
3361 #define RCC_SAIxCFGR_SAIxRST BIT(0)
3362 #define RCC_SAIxCFGR_SAIxEN BIT(1)
3363 #define RCC_SAIxCFGR_SAIxLPEN BIT(2)
3366 #define RCC_MDF1CFGR_MDF1RST BIT(0)
3367 #define RCC_MDF1CFGR_MDF1EN BIT(1)
3368 #define RCC_MDF1CFGR_MDF1LPEN BIT(2)
3371 #define RCC_ADF1CFGR_ADF1RST BIT(0)
3372 #define RCC_ADF1CFGR_ADF1EN BIT(1)
3373 #define RCC_ADF1CFGR_ADF1LPEN BIT(2)
3374 #define RCC_ADF1CFGR_ADF1AMEN BIT(3)
3377 #define RCC_FDCANCFGR_FDCANRST BIT(0)
3378 #define RCC_FDCANCFGR_FDCANEN BIT(1)
3379 #define RCC_FDCANCFGR_FDCANLPEN BIT(2)
3382 #define RCC_HDPCFGR_HDPRST BIT(0)
3383 #define RCC_HDPCFGR_HDPEN BIT(1)
3386 #define RCC_ADC12CFGR_ADC12RST BIT(0)
3387 #define RCC_ADC12CFGR_ADC12EN BIT(1)
3388 #define RCC_ADC12CFGR_ADC12LPEN BIT(2)
3389 #define RCC_ADC12CFGR_ADC12KERSEL BIT(12)
3392 #define RCC_ADC3CFGR_ADC3RST BIT(0)
3393 #define RCC_ADC3CFGR_ADC3EN BIT(1)
3394 #define RCC_ADC3CFGR_ADC3LPEN BIT(2)
3399 #define RCC_ETH1CFGR_ETH1RST BIT(0)
3400 #define RCC_ETH1CFGR_ETH1MACEN BIT(1)
3401 #define RCC_ETH1CFGR_ETH1MACLPEN BIT(2)
3402 #define RCC_ETH1CFGR_ETH1STPEN BIT(4)
3403 #define RCC_ETH1CFGR_ETH1EN BIT(5)
3404 #define RCC_ETH1CFGR_ETH1LPEN BIT(6)
3405 #define RCC_ETH1CFGR_ETH1TXEN BIT(8)
3406 #define RCC_ETH1CFGR_ETH1TXLPEN BIT(9)
3407 #define RCC_ETH1CFGR_ETH1RXEN BIT(10)
3408 #define RCC_ETH1CFGR_ETH1RXLPEN BIT(11)
3411 #define RCC_ETH2CFGR_ETH2RST BIT(0)
3412 #define RCC_ETH2CFGR_ETH2MACEN BIT(1)
3413 #define RCC_ETH2CFGR_ETH2MACLPEN BIT(2)
3414 #define RCC_ETH2CFGR_ETH2STPEN BIT(4)
3415 #define RCC_ETH2CFGR_ETH2EN BIT(5)
3416 #define RCC_ETH2CFGR_ETH2LPEN BIT(6)
3417 #define RCC_ETH2CFGR_ETH2TXEN BIT(8)
3418 #define RCC_ETH2CFGR_ETH2TXLPEN BIT(9)
3419 #define RCC_ETH2CFGR_ETH2RXEN BIT(10)
3420 #define RCC_ETH2CFGR_ETH2RXLPEN BIT(11)
3423 #define RCC_ETHxCFGR_ETHxRST BIT(0)
3424 #define RCC_ETHxCFGR_ETHxMACEN BIT(1)
3425 #define RCC_ETHxCFGR_ETHxMACLPEN BIT(2)
3426 #define RCC_ETHxCFGR_ETHxSTPEN BIT(4)
3427 #define RCC_ETHxCFGR_ETHxEN BIT(5)
3428 #define RCC_ETHxCFGR_ETHxLPEN BIT(6)
3429 #define RCC_ETHxCFGR_ETHxTXEN BIT(8)
3430 #define RCC_ETHxCFGR_ETHxTXLPEN BIT(9)
3431 #define RCC_ETHxCFGR_ETHxRXEN BIT(10)
3432 #define RCC_ETHxCFGR_ETHxRXLPEN BIT(11)
3435 #define RCC_USB2CFGR_USB2RST BIT(0)
3436 #define RCC_USB2CFGR_USB2EN BIT(1)
3437 #define RCC_USB2CFGR_USB2LPEN BIT(2)
3438 #define RCC_USB2CFGR_USB2STPEN BIT(4)
3441 #define RCC_USB2PHY1CFGR_USB2PHY1RST BIT(0)
3442 #define RCC_USB2PHY1CFGR_USB2PHY1EN BIT(1)
3443 #define RCC_USB2PHY1CFGR_USB2PHY1LPEN BIT(2)
3444 #define RCC_USB2PHY1CFGR_USB2PHY1STPEN BIT(4)
3445 #define RCC_USB2PHY1CFGR_USB2PHY1CKREFSEL BIT(15)
3448 #define RCC_USB2PHY2CFGR_USB2PHY2RST BIT(0)
3449 #define RCC_USB2PHY2CFGR_USB2PHY2EN BIT(1)
3450 #define RCC_USB2PHY2CFGR_USB2PHY2LPEN BIT(2)
3451 #define RCC_USB2PHY2CFGR_USB2PHY2STPEN BIT(4)
3452 #define RCC_USB2PHY2CFGR_USB2PHY2CKREFSEL BIT(15)
3455 #define RCC_USB2PHYxCFGR_USB2PHY1RST BIT(0)
3456 #define RCC_USB2PHYxCFGR_USB2PHY1EN BIT(1)
3457 #define RCC_USB2PHYxCFGR_USB2PHY1LPEN BIT(2)
3458 #define RCC_USB2PHYxCFGR_USB2PHY1STPEN BIT(4)
3459 #define RCC_USB2PHYxCFGR_USB2PHY1CKREFSEL BIT(15)
3462 #define RCC_USB3DRDCFGR_USB3DRDRST BIT(0)
3463 #define RCC_USB3DRDCFGR_USB3DRDEN BIT(1)
3464 #define RCC_USB3DRDCFGR_USB3DRDLPEN BIT(2)
3465 #define RCC_USB3DRDCFGR_USB3DRDSTPEN BIT(4)
3468 #define RCC_USB3PCIEPHYCFGR_USB3PCIEPHYRST BIT(0)
3469 #define RCC_USB3PCIEPHYCFGR_USB3PCIEPHYEN BIT(1)
3470 #define RCC_USB3PCIEPHYCFGR_USB3PCIEPHYLPEN BIT(2)
3471 #define RCC_USB3PCIEPHYCFGR_USB3PCIEPHYSTPEN BIT(4)
3472 #define RCC_USB3PCIEPHYCFGR_USB3PCIEPHYCKREFSEL BIT(15)
3475 #define RCC_PCIECFGR_PCIERST BIT(0)
3476 #define RCC_PCIECFGR_PCIEEN BIT(1)
3477 #define RCC_PCIECFGR_PCIELPEN BIT(2)
3478 #define RCC_PCIECFGR_PCIESTPEN BIT(4)
3481 #define RCC_USBTCCFGR_USBTCRST BIT(0)
3482 #define RCC_USBTCCFGR_USBTCEN BIT(1)
3483 #define RCC_USBTCCFGR_USBTCLPEN BIT(2)
3486 #define RCC_ETHSWCFGR_ETHSWRST BIT(0)
3487 #define RCC_ETHSWCFGR_ETHSWMACEN BIT(1)
3488 #define RCC_ETHSWCFGR_ETHSWMACLPEN BIT(2)
3489 #define RCC_ETHSWCFGR_ETHSWEN BIT(5)
3490 #define RCC_ETHSWCFGR_ETHSWLPEN BIT(6)
3491 #define RCC_ETHSWCFGR_ETHSWREFEN BIT(21)
3492 #define RCC_ETHSWCFGR_ETHSWREFLPEN BIT(22)
3495 #define RCC_ETHSWACMCFGR_ETHSWACMEN BIT(1)
3496 #define RCC_ETHSWACMCFGR_ETHSWACMLPEN BIT(2)
3499 #define RCC_ETHSWACMMSGCFGR_ETHSWACMMSGEN BIT(1)
3500 #define RCC_ETHSWACMMSGCFGR_ETHSWACMMSGLPEN BIT(2)
3503 #define RCC_STGENCFGR_STGENEN BIT(1)
3504 #define RCC_STGENCFGR_STGENLPEN BIT(2)
3505 #define RCC_STGENCFGR_STGENSTPEN BIT(4)
3508 #define RCC_SDMMC1CFGR_SDMMC1RST BIT(0)
3509 #define RCC_SDMMC1CFGR_SDMMC1EN BIT(1)
3510 #define RCC_SDMMC1CFGR_SDMMC1LPEN BIT(2)
3511 #define RCC_SDMMC1CFGR_SDMMC1DLLRST BIT(16)
3514 #define RCC_SDMMC2CFGR_SDMMC2RST BIT(0)
3515 #define RCC_SDMMC2CFGR_SDMMC2EN BIT(1)
3516 #define RCC_SDMMC2CFGR_SDMMC2LPEN BIT(2)
3517 #define RCC_SDMMC2CFGR_SDMMC2DLLRST BIT(16)
3520 #define RCC_SDMMC3CFGR_SDMMC3RST BIT(0)
3521 #define RCC_SDMMC3CFGR_SDMMC3EN BIT(1)
3522 #define RCC_SDMMC3CFGR_SDMMC3LPEN BIT(2)
3523 #define RCC_SDMMC3CFGR_SDMMC3DLLRST BIT(16)
3526 #define RCC_SDMMCxCFGR_SDMMC1RST BIT(0)
3527 #define RCC_SDMMCxCFGR_SDMMC1EN BIT(1)
3528 #define RCC_SDMMCxCFGR_SDMMC1LPEN BIT(2)
3529 #define RCC_SDMMCxCFGR_SDMMC1DLLRST BIT(16)
3532 #define RCC_GPUCFGR_GPURST BIT(0)
3533 #define RCC_GPUCFGR_GPUEN BIT(1)
3534 #define RCC_GPUCFGR_GPULPEN BIT(2)
3537 #define RCC_LTDCCFGR_LTDCRST BIT(0)
3538 #define RCC_LTDCCFGR_LTDCEN BIT(1)
3539 #define RCC_LTDCCFGR_LTDCLPEN BIT(2)
3542 #define RCC_DSICFGR_DSIRST BIT(0)
3543 #define RCC_DSICFGR_DSIEN BIT(1)
3544 #define RCC_DSICFGR_DSILPEN BIT(2)
3545 #define RCC_DSICFGR_DSIBLSEL BIT(12)
3546 #define RCC_DSICFGR_DSIPHYCKREFSEL BIT(15)
3549 #define RCC_LVDSCFGR_LVDSRST BIT(0)
3550 #define RCC_LVDSCFGR_LVDSEN BIT(1)
3551 #define RCC_LVDSCFGR_LVDSLPEN BIT(2)
3552 #define RCC_LVDSCFGR_LVDSPHYCKREFSEL BIT(15)
3555 #define RCC_CSI2CFGR_CSI2RST BIT(0)
3556 #define RCC_CSI2CFGR_CSI2EN BIT(1)
3557 #define RCC_CSI2CFGR_CSI2LPEN BIT(2)
3560 #define RCC_DCMIPPCFGR_DCMIPPRST BIT(0)
3561 #define RCC_DCMIPPCFGR_DCMIPPEN BIT(1)
3562 #define RCC_DCMIPPCFGR_DCMIPPLPEN BIT(2)
3565 #define RCC_CCICFGR_CCIRST BIT(0)
3566 #define RCC_CCICFGR_CCIEN BIT(1)
3567 #define RCC_CCICFGR_CCILPEN BIT(2)
3570 #define RCC_VDECCFGR_VDECRST BIT(0)
3571 #define RCC_VDECCFGR_VDECEN BIT(1)
3572 #define RCC_VDECCFGR_VDECLPEN BIT(2)
3575 #define RCC_VENCCFGR_VENCRST BIT(0)
3576 #define RCC_VENCCFGR_VENCEN BIT(1)
3577 #define RCC_VENCCFGR_VENCLPEN BIT(2)
3580 #define RCC_RNGCFGR_RNGRST BIT(0)
3581 #define RCC_RNGCFGR_RNGEN BIT(1)
3582 #define RCC_RNGCFGR_RNGLPEN BIT(2)
3585 #define RCC_PKACFGR_PKARST BIT(0)
3586 #define RCC_PKACFGR_PKAEN BIT(1)
3587 #define RCC_PKACFGR_PKALPEN BIT(2)
3590 #define RCC_SAESCFGR_SAESRST BIT(0)
3591 #define RCC_SAESCFGR_SAESEN BIT(1)
3592 #define RCC_SAESCFGR_SAESLPEN BIT(2)
3595 #define RCC_HASHCFGR_HASHRST BIT(0)
3596 #define RCC_HASHCFGR_HASHEN BIT(1)
3597 #define RCC_HASHCFGR_HASHLPEN BIT(2)
3600 #define RCC_CRYP1CFGR_CRYP1RST BIT(0)
3601 #define RCC_CRYP1CFGR_CRYP1EN BIT(1)
3602 #define RCC_CRYP1CFGR_CRYP1LPEN BIT(2)
3605 #define RCC_CRYP2CFGR_CRYP2RST BIT(0)
3606 #define RCC_CRYP2CFGR_CRYP2EN BIT(1)
3607 #define RCC_CRYP2CFGR_CRYP2LPEN BIT(2)
3610 #define RCC_CRYPxCFGR_CRYPxRST BIT(0)
3611 #define RCC_CRYPxCFGR_CRYPxEN BIT(1)
3612 #define RCC_CRYPxCFGR_CRYPxLPEN BIT(2)
3615 #define RCC_IWDG1CFGR_IWDG1EN BIT(1)
3616 #define RCC_IWDG1CFGR_IWDG1LPEN BIT(2)
3619 #define RCC_IWDG2CFGR_IWDG2EN BIT(1)
3620 #define RCC_IWDG2CFGR_IWDG2LPEN BIT(2)
3623 #define RCC_IWDG3CFGR_IWDG3EN BIT(1)
3624 #define RCC_IWDG3CFGR_IWDG3LPEN BIT(2)
3627 #define RCC_IWDG4CFGR_IWDG4EN BIT(1)
3628 #define RCC_IWDG4CFGR_IWDG4LPEN BIT(2)
3631 #define RCC_IWDGxCFGR_IWDGxEN BIT(1)
3632 #define RCC_IWDGxCFGR_IWDGxLPEN BIT(2)
3635 #define RCC_IWDG5CFGR_IWDG5EN BIT(1)
3636 #define RCC_IWDG5CFGR_IWDG5LPEN BIT(2)
3637 #define RCC_IWDG5CFGR_IWDG5AMEN BIT(3)
3640 #define RCC_WWDG1CFGR_WWDG1RST BIT(0)
3641 #define RCC_WWDG1CFGR_WWDG1EN BIT(1)
3642 #define RCC_WWDG1CFGR_WWDG1LPEN BIT(2)
3645 #define RCC_WWDG2CFGR_WWDG2RST BIT(0)
3646 #define RCC_WWDG2CFGR_WWDG2EN BIT(1)
3647 #define RCC_WWDG2CFGR_WWDG2LPEN BIT(2)
3648 #define RCC_WWDG2CFGR_WWDG2AMEN BIT(3)
3651 #define RCC_BUSPERFMCFGR_BUSPERFMRST BIT(0)
3652 #define RCC_BUSPERFMCFGR_BUSPERFMEN BIT(1)
3653 #define RCC_BUSPERFMCFGR_BUSPERFMLPEN BIT(2)
3656 #define RCC_VREFCFGR_VREFRST BIT(0)
3657 #define RCC_VREFCFGR_VREFEN BIT(1)
3658 #define RCC_VREFCFGR_VREFLPEN BIT(2)
3661 #define RCC_TMPSENSCFGR_TMPSENSRST BIT(0)
3662 #define RCC_TMPSENSCFGR_TMPSENSEN BIT(1)
3663 #define RCC_TMPSENSCFGR_TMPSENSLPEN BIT(2)
3668 #define RCC_CRCCFGR_CRCRST BIT(0)
3669 #define RCC_CRCCFGR_CRCEN BIT(1)
3670 #define RCC_CRCCFGR_CRCLPEN BIT(2)
3673 #define RCC_SERCCFGR_SERCRST BIT(0)
3674 #define RCC_SERCCFGR_SERCEN BIT(1)
3675 #define RCC_SERCCFGR_SERCLPEN BIT(2)
3678 #define RCC_OSPIIOMCFGR_OSPIIOMRST BIT(0)
3679 #define RCC_OSPIIOMCFGR_OSPIIOMEN BIT(1)
3680 #define RCC_OSPIIOMCFGR_OSPIIOMLPEN BIT(2)
3683 #define RCC_GICV2MCFGR_GICV2MEN BIT(1)
3684 #define RCC_GICV2MCFGR_GICV2MLPEN BIT(2)
3687 #define RCC_I3C1CFGR_I3C1RST BIT(0)
3688 #define RCC_I3C1CFGR_I3C1EN BIT(1)
3689 #define RCC_I3C1CFGR_I3C1LPEN BIT(2)
3692 #define RCC_I3C2CFGR_I3C2RST BIT(0)
3693 #define RCC_I3C2CFGR_I3C2EN BIT(1)
3694 #define RCC_I3C2CFGR_I3C2LPEN BIT(2)
3697 #define RCC_I3C3CFGR_I3C3RST BIT(0)
3698 #define RCC_I3C3CFGR_I3C3EN BIT(1)
3699 #define RCC_I3C3CFGR_I3C3LPEN BIT(2)
3702 #define RCC_I3C4CFGR_I3C4RST BIT(0)
3703 #define RCC_I3C4CFGR_I3C4EN BIT(1)
3704 #define RCC_I3C4CFGR_I3C4LPEN BIT(2)
3705 #define RCC_I3C4CFGR_I3C4AMEN BIT(3)
3708 #define RCC_I3CxCFGR_I3CxRST BIT(0)
3709 #define RCC_I3CxCFGR_I3CxEN BIT(1)
3710 #define RCC_I3CxCFGR_I3CxLPEN BIT(2)
3711 #define RCC_I3CxCFGR_I3CxAMEN BIT(3)
3734 #define RCC_XBAR0CFGR_XBAR0EN BIT(6)
3735 #define RCC_XBAR0CFGR_XBAR0STS BIT(7)
3740 #define RCC_XBAR1CFGR_XBAR1EN BIT(6)
3741 #define RCC_XBAR1CFGR_XBAR1STS BIT(7)
3746 #define RCC_XBAR2CFGR_XBAR2EN BIT(6)
3747 #define RCC_XBAR2CFGR_XBAR2STS BIT(7)
3752 #define RCC_XBAR3CFGR_XBAR3EN BIT(6)
3753 #define RCC_XBAR3CFGR_XBAR3STS BIT(7)
3758 #define RCC_XBAR4CFGR_XBAR4EN BIT(6)
3759 #define RCC_XBAR4CFGR_XBAR4STS BIT(7)
3764 #define RCC_XBAR5CFGR_XBAR5EN BIT(6)
3765 #define RCC_XBAR5CFGR_XBAR5STS BIT(7)
3770 #define RCC_XBAR6CFGR_XBAR6EN BIT(6)
3771 #define RCC_XBAR6CFGR_XBAR6STS BIT(7)
3776 #define RCC_XBAR7CFGR_XBAR7EN BIT(6)
3777 #define RCC_XBAR7CFGR_XBAR7STS BIT(7)
3782 #define RCC_XBAR8CFGR_XBAR8EN BIT(6)
3783 #define RCC_XBAR8CFGR_XBAR8STS BIT(7)
3788 #define RCC_XBAR9CFGR_XBAR9EN BIT(6)
3789 #define RCC_XBAR9CFGR_XBAR9STS BIT(7)
3794 #define RCC_XBAR10CFGR_XBAR10EN BIT(6)
3795 #define RCC_XBAR10CFGR_XBAR10STS BIT(7)
3800 #define RCC_XBAR11CFGR_XBAR11EN BIT(6)
3801 #define RCC_XBAR11CFGR_XBAR11STS BIT(7)
3806 #define RCC_XBAR12CFGR_XBAR12EN BIT(6)
3807 #define RCC_XBAR12CFGR_XBAR12STS BIT(7)
3812 #define RCC_XBAR13CFGR_XBAR13EN BIT(6)
3813 #define RCC_XBAR13CFGR_XBAR13STS BIT(7)
3818 #define RCC_XBAR14CFGR_XBAR14EN BIT(6)
3819 #define RCC_XBAR14CFGR_XBAR14STS BIT(7)
3824 #define RCC_XBAR15CFGR_XBAR15EN BIT(6)
3825 #define RCC_XBAR15CFGR_XBAR15STS BIT(7)
3830 #define RCC_XBAR16CFGR_XBAR16EN BIT(6)
3831 #define RCC_XBAR16CFGR_XBAR16STS BIT(7)
3836 #define RCC_XBAR17CFGR_XBAR17EN BIT(6)
3837 #define RCC_XBAR17CFGR_XBAR17STS BIT(7)
3842 #define RCC_XBAR18CFGR_XBAR18EN BIT(6)
3843 #define RCC_XBAR18CFGR_XBAR18STS BIT(7)
3848 #define RCC_XBAR19CFGR_XBAR19EN BIT(6)
3849 #define RCC_XBAR19CFGR_XBAR19STS BIT(7)
3854 #define RCC_XBAR20CFGR_XBAR20EN BIT(6)
3855 #define RCC_XBAR20CFGR_XBAR20STS BIT(7)
3860 #define RCC_XBAR21CFGR_XBAR21EN BIT(6)
3861 #define RCC_XBAR21CFGR_XBAR21STS BIT(7)
3866 #define RCC_XBAR22CFGR_XBAR22EN BIT(6)
3867 #define RCC_XBAR22CFGR_XBAR22STS BIT(7)
3872 #define RCC_XBAR23CFGR_XBAR23EN BIT(6)
3873 #define RCC_XBAR23CFGR_XBAR23STS BIT(7)
3878 #define RCC_XBAR24CFGR_XBAR24EN BIT(6)
3879 #define RCC_XBAR24CFGR_XBAR24STS BIT(7)
3884 #define RCC_XBAR25CFGR_XBAR25EN BIT(6)
3885 #define RCC_XBAR25CFGR_XBAR25STS BIT(7)
3890 #define RCC_XBAR26CFGR_XBAR26EN BIT(6)
3891 #define RCC_XBAR26CFGR_XBAR26STS BIT(7)
3896 #define RCC_XBAR27CFGR_XBAR27EN BIT(6)
3897 #define RCC_XBAR27CFGR_XBAR27STS BIT(7)
3902 #define RCC_XBAR28CFGR_XBAR28EN BIT(6)
3903 #define RCC_XBAR28CFGR_XBAR28STS BIT(7)
3908 #define RCC_XBAR29CFGR_XBAR29EN BIT(6)
3909 #define RCC_XBAR29CFGR_XBAR29STS BIT(7)
3914 #define RCC_XBAR30CFGR_XBAR30EN BIT(6)
3915 #define RCC_XBAR30CFGR_XBAR30STS BIT(7)
3920 #define RCC_XBAR31CFGR_XBAR31EN BIT(6)
3921 #define RCC_XBAR31CFGR_XBAR31STS BIT(7)
3926 #define RCC_XBAR32CFGR_XBAR32EN BIT(6)
3927 #define RCC_XBAR32CFGR_XBAR32STS BIT(7)
3932 #define RCC_XBAR33CFGR_XBAR33EN BIT(6)
3933 #define RCC_XBAR33CFGR_XBAR33STS BIT(7)
3938 #define RCC_XBAR34CFGR_XBAR34EN BIT(6)
3939 #define RCC_XBAR34CFGR_XBAR34STS BIT(7)
3944 #define RCC_XBAR35CFGR_XBAR35EN BIT(6)
3945 #define RCC_XBAR35CFGR_XBAR35STS BIT(7)
3950 #define RCC_XBAR36CFGR_XBAR36EN BIT(6)
3951 #define RCC_XBAR36CFGR_XBAR36STS BIT(7)
3956 #define RCC_XBAR37CFGR_XBAR37EN BIT(6)
3957 #define RCC_XBAR37CFGR_XBAR37STS BIT(7)
3962 #define RCC_XBAR38CFGR_XBAR38EN BIT(6)
3963 #define RCC_XBAR38CFGR_XBAR38STS BIT(7)
3968 #define RCC_XBAR39CFGR_XBAR39EN BIT(6)
3969 #define RCC_XBAR39CFGR_XBAR39STS BIT(7)
3974 #define RCC_XBAR40CFGR_XBAR40EN BIT(6)
3975 #define RCC_XBAR40CFGR_XBAR40STS BIT(7)
3980 #define RCC_XBAR41CFGR_XBAR41EN BIT(6)
3981 #define RCC_XBAR41CFGR_XBAR41STS BIT(7)
3986 #define RCC_XBAR42CFGR_XBAR42EN BIT(6)
3987 #define RCC_XBAR42CFGR_XBAR42STS BIT(7)
3992 #define RCC_XBAR43CFGR_XBAR43EN BIT(6)
3993 #define RCC_XBAR43CFGR_XBAR43STS BIT(7)
3998 #define RCC_XBAR44CFGR_XBAR44EN BIT(6)
3999 #define RCC_XBAR44CFGR_XBAR44STS BIT(7)
4004 #define RCC_XBAR45CFGR_XBAR45EN BIT(6)
4005 #define RCC_XBAR45CFGR_XBAR45STS BIT(7)
4010 #define RCC_XBAR46CFGR_XBAR46EN BIT(6)
4011 #define RCC_XBAR46CFGR_XBAR46STS BIT(7)
4016 #define RCC_XBAR47CFGR_XBAR47EN BIT(6)
4017 #define RCC_XBAR47CFGR_XBAR47STS BIT(7)
4022 #define RCC_XBAR48CFGR_XBAR48EN BIT(6)
4023 #define RCC_XBAR48CFGR_XBAR48STS BIT(7)
4028 #define RCC_XBAR49CFGR_XBAR49EN BIT(6)
4029 #define RCC_XBAR49CFGR_XBAR49STS BIT(7)
4034 #define RCC_XBAR50CFGR_XBAR50EN BIT(6)
4035 #define RCC_XBAR50CFGR_XBAR50STS BIT(7)
4040 #define RCC_XBAR51CFGR_XBAR51EN BIT(6)
4041 #define RCC_XBAR51CFGR_XBAR51STS BIT(7)
4046 #define RCC_XBAR52CFGR_XBAR52EN BIT(6)
4047 #define RCC_XBAR52CFGR_XBAR52STS BIT(7)
4052 #define RCC_XBAR53CFGR_XBAR53EN BIT(6)
4053 #define RCC_XBAR53CFGR_XBAR53STS BIT(7)
4058 #define RCC_XBAR54CFGR_XBAR54EN BIT(6)
4059 #define RCC_XBAR54CFGR_XBAR54STS BIT(7)
4064 #define RCC_XBAR55CFGR_XBAR55EN BIT(6)
4065 #define RCC_XBAR55CFGR_XBAR55STS BIT(7)
4070 #define RCC_XBAR56CFGR_XBAR56EN BIT(6)
4071 #define RCC_XBAR56CFGR_XBAR56STS BIT(7)
4076 #define RCC_XBAR57CFGR_XBAR57EN BIT(6)
4077 #define RCC_XBAR57CFGR_XBAR57STS BIT(7)
4082 #define RCC_XBAR58CFGR_XBAR58EN BIT(6)
4083 #define RCC_XBAR58CFGR_XBAR58STS BIT(7)
4088 #define RCC_XBAR59CFGR_XBAR59EN BIT(6)
4089 #define RCC_XBAR59CFGR_XBAR59STS BIT(7)
4094 #define RCC_XBAR60CFGR_XBAR60EN BIT(6)
4095 #define RCC_XBAR60CFGR_XBAR60STS BIT(7)
4100 #define RCC_XBAR61CFGR_XBAR61EN BIT(6)
4101 #define RCC_XBAR61CFGR_XBAR61STS BIT(7)
4106 #define RCC_XBAR62CFGR_XBAR62EN BIT(6)
4107 #define RCC_XBAR62CFGR_XBAR62STS BIT(7)
4112 #define RCC_XBAR63CFGR_XBAR63EN BIT(6)
4113 #define RCC_XBAR63CFGR_XBAR63STS BIT(7)
4118 #define RCC_XBARxCFGR_XBARxEN BIT(6)
4119 #define RCC_XBARxCFGR_XBARxSTS BIT(7)
4384 #define RCC_FINDIV0CFGR_FINDIV0EN BIT(6)
4389 #define RCC_FINDIV1CFGR_FINDIV1EN BIT(6)
4394 #define RCC_FINDIV2CFGR_FINDIV2EN BIT(6)
4399 #define RCC_FINDIV3CFGR_FINDIV3EN BIT(6)
4404 #define RCC_FINDIV4CFGR_FINDIV4EN BIT(6)
4409 #define RCC_FINDIV5CFGR_FINDIV5EN BIT(6)
4414 #define RCC_FINDIV6CFGR_FINDIV6EN BIT(6)
4419 #define RCC_FINDIV7CFGR_FINDIV7EN BIT(6)
4424 #define RCC_FINDIV8CFGR_FINDIV8EN BIT(6)
4429 #define RCC_FINDIV9CFGR_FINDIV9EN BIT(6)
4434 #define RCC_FINDIV10CFGR_FINDIV10EN BIT(6)
4439 #define RCC_FINDIV11CFGR_FINDIV11EN BIT(6)
4444 #define RCC_FINDIV12CFGR_FINDIV12EN BIT(6)
4449 #define RCC_FINDIV13CFGR_FINDIV13EN BIT(6)
4454 #define RCC_FINDIV14CFGR_FINDIV14EN BIT(6)
4459 #define RCC_FINDIV15CFGR_FINDIV15EN BIT(6)
4464 #define RCC_FINDIV16CFGR_FINDIV16EN BIT(6)
4469 #define RCC_FINDIV17CFGR_FINDIV17EN BIT(6)
4474 #define RCC_FINDIV18CFGR_FINDIV18EN BIT(6)
4479 #define RCC_FINDIV19CFGR_FINDIV19EN BIT(6)
4484 #define RCC_FINDIV20CFGR_FINDIV20EN BIT(6)
4489 #define RCC_FINDIV21CFGR_FINDIV21EN BIT(6)
4494 #define RCC_FINDIV22CFGR_FINDIV22EN BIT(6)
4499 #define RCC_FINDIV23CFGR_FINDIV23EN BIT(6)
4504 #define RCC_FINDIV24CFGR_FINDIV24EN BIT(6)
4509 #define RCC_FINDIV25CFGR_FINDIV25EN BIT(6)
4514 #define RCC_FINDIV26CFGR_FINDIV26EN BIT(6)
4519 #define RCC_FINDIV27CFGR_FINDIV27EN BIT(6)
4524 #define RCC_FINDIV28CFGR_FINDIV28EN BIT(6)
4529 #define RCC_FINDIV29CFGR_FINDIV29EN BIT(6)
4534 #define RCC_FINDIV30CFGR_FINDIV30EN BIT(6)
4539 #define RCC_FINDIV31CFGR_FINDIV31EN BIT(6)
4544 #define RCC_FINDIV32CFGR_FINDIV32EN BIT(6)
4549 #define RCC_FINDIV33CFGR_FINDIV33EN BIT(6)
4554 #define RCC_FINDIV34CFGR_FINDIV34EN BIT(6)
4559 #define RCC_FINDIV35CFGR_FINDIV35EN BIT(6)
4564 #define RCC_FINDIV36CFGR_FINDIV36EN BIT(6)
4569 #define RCC_FINDIV37CFGR_FINDIV37EN BIT(6)
4574 #define RCC_FINDIV38CFGR_FINDIV38EN BIT(6)
4579 #define RCC_FINDIV39CFGR_FINDIV39EN BIT(6)
4584 #define RCC_FINDIV40CFGR_FINDIV40EN BIT(6)
4589 #define RCC_FINDIV41CFGR_FINDIV41EN BIT(6)
4594 #define RCC_FINDIV42CFGR_FINDIV42EN BIT(6)
4599 #define RCC_FINDIV43CFGR_FINDIV43EN BIT(6)
4604 #define RCC_FINDIV44CFGR_FINDIV44EN BIT(6)
4609 #define RCC_FINDIV45CFGR_FINDIV45EN BIT(6)
4614 #define RCC_FINDIV46CFGR_FINDIV46EN BIT(6)
4619 #define RCC_FINDIV47CFGR_FINDIV47EN BIT(6)
4624 #define RCC_FINDIV48CFGR_FINDIV48EN BIT(6)
4629 #define RCC_FINDIV49CFGR_FINDIV49EN BIT(6)
4634 #define RCC_FINDIV50CFGR_FINDIV50EN BIT(6)
4639 #define RCC_FINDIV51CFGR_FINDIV51EN BIT(6)
4644 #define RCC_FINDIV52CFGR_FINDIV52EN BIT(6)
4649 #define RCC_FINDIV53CFGR_FINDIV53EN BIT(6)
4654 #define RCC_FINDIV54CFGR_FINDIV54EN BIT(6)
4659 #define RCC_FINDIV55CFGR_FINDIV55EN BIT(6)
4664 #define RCC_FINDIV56CFGR_FINDIV56EN BIT(6)
4669 #define RCC_FINDIV57CFGR_FINDIV57EN BIT(6)
4674 #define RCC_FINDIV58CFGR_FINDIV58EN BIT(6)
4679 #define RCC_FINDIV59CFGR_FINDIV59EN BIT(6)
4684 #define RCC_FINDIV60CFGR_FINDIV60EN BIT(6)
4689 #define RCC_FINDIV61CFGR_FINDIV61EN BIT(6)
4694 #define RCC_FINDIV62CFGR_FINDIV62EN BIT(6)
4699 #define RCC_FINDIV63CFGR_FINDIV63EN BIT(6)
4704 #define RCC_FINDIVxCFGR_FINDIVxEN BIT(6)
4711 #define RCC_FCALCOBS0CFGR_FCALCCKEXTSEL BIT(15)
4712 #define RCC_FCALCOBS0CFGR_CKOBSEXTSEL BIT(16)
4713 #define RCC_FCALCOBS0CFGR_FCALCCKINV BIT(17)
4714 #define RCC_FCALCOBS0CFGR_CKOBSINV BIT(18)
4717 #define RCC_FCALCOBS0CFGR_FCALCCKEN BIT(25)
4718 #define RCC_FCALCOBS0CFGR_CKOBSEN BIT(26)
4725 #define RCC_FCALCOBS1CFGR_CKOBSEXTSEL BIT(16)
4726 #define RCC_FCALCOBS1CFGR_CKOBSINV BIT(18)
4729 #define RCC_FCALCOBS1CFGR_CKOBSEN BIT(26)
4730 #define RCC_FCALCOBS1CFGR_FCALCRSTN BIT(27)
4737 #define RCC_FCALCCR1_FCALCRUN BIT(0)
4750 #define RCC_FCALCSR_FCALCSTS BIT(19)
4753 #define RCC_PLL4CFGR1_SSMODRST BIT(0)
4754 #define RCC_PLL4CFGR1_PLLEN BIT(8)
4755 #define RCC_PLL4CFGR1_PLLRDY BIT(24)
4756 #define RCC_PLL4CFGR1_CKREFST BIT(28)
4767 #define RCC_PLL4CFGR3_DOWNSPREAD BIT(24)
4768 #define RCC_PLL4CFGR3_DACEN BIT(25)
4769 #define RCC_PLL4CFGR3_SSCGDIS BIT(26)
4772 #define RCC_PLL4CFGR4_DSMEN BIT(8)
4773 #define RCC_PLL4CFGR4_FOUTPOSTDIVEN BIT(9)
4774 #define RCC_PLL4CFGR4_BYPASS BIT(10)
4791 #define RCC_PLL5CFGR1_SSMODRST BIT(0)
4792 #define RCC_PLL5CFGR1_PLLEN BIT(8)
4793 #define RCC_PLL5CFGR1_PLLRDY BIT(24)
4794 #define RCC_PLL5CFGR1_CKREFST BIT(28)
4805 #define RCC_PLL5CFGR3_DOWNSPREAD BIT(24)
4806 #define RCC_PLL5CFGR3_DACEN BIT(25)
4807 #define RCC_PLL5CFGR3_SSCGDIS BIT(26)
4810 #define RCC_PLL5CFGR4_DSMEN BIT(8)
4811 #define RCC_PLL5CFGR4_FOUTPOSTDIVEN BIT(9)
4812 #define RCC_PLL5CFGR4_BYPASS BIT(10)
4829 #define RCC_PLL6CFGR1_SSMODRST BIT(0)
4830 #define RCC_PLL6CFGR1_PLLEN BIT(8)
4831 #define RCC_PLL6CFGR1_PLLRDY BIT(24)
4832 #define RCC_PLL6CFGR1_CKREFST BIT(28)
4843 #define RCC_PLL6CFGR3_DOWNSPREAD BIT(24)
4844 #define RCC_PLL6CFGR3_DACEN BIT(25)
4845 #define RCC_PLL6CFGR3_SSCGDIS BIT(26)
4848 #define RCC_PLL6CFGR4_DSMEN BIT(8)
4849 #define RCC_PLL6CFGR4_FOUTPOSTDIVEN BIT(9)
4850 #define RCC_PLL6CFGR4_BYPASS BIT(10)
4867 #define RCC_PLL7CFGR1_SSMODRST BIT(0)
4868 #define RCC_PLL7CFGR1_PLLEN BIT(8)
4869 #define RCC_PLL7CFGR1_PLLRDY BIT(24)
4870 #define RCC_PLL7CFGR1_CKREFST BIT(28)
4881 #define RCC_PLL7CFGR3_DOWNSPREAD BIT(24)
4882 #define RCC_PLL7CFGR3_DACEN BIT(25)
4883 #define RCC_PLL7CFGR3_SSCGDIS BIT(26)
4886 #define RCC_PLL7CFGR4_DSMEN BIT(8)
4887 #define RCC_PLL7CFGR4_FOUTPOSTDIVEN BIT(9)
4888 #define RCC_PLL7CFGR4_BYPASS BIT(10)
4905 #define RCC_PLL8CFGR1_SSMODRST BIT(0)
4906 #define RCC_PLL8CFGR1_PLLEN BIT(8)
4907 #define RCC_PLL8CFGR1_PLLRDY BIT(24)
4908 #define RCC_PLL8CFGR1_CKREFST BIT(28)
4919 #define RCC_PLL8CFGR3_DOWNSPREAD BIT(24)
4920 #define RCC_PLL8CFGR3_DACEN BIT(25)
4921 #define RCC_PLL8CFGR3_SSCGDIS BIT(26)
4924 #define RCC_PLL8CFGR4_DSMEN BIT(8)
4925 #define RCC_PLL8CFGR4_FOUTPOSTDIVEN BIT(9)
4926 #define RCC_PLL8CFGR4_BYPASS BIT(10)
4943 #define RCC_PLLxCFGR1_SSMODRST BIT(0)
4944 #define RCC_PLLxCFGR1_PLLEN BIT(8)
4945 #define RCC_PLLxCFGR1_PLLRDY BIT(24)
4946 #define RCC_PLLxCFGR1_CKREFST BIT(28)
4957 #define RCC_PLLxCFGR3_DOWNSPREAD BIT(24)
4958 #define RCC_PLLxCFGR3_DACEN BIT(25)
4959 #define RCC_PLLxCFGR3_SSCGDIS BIT(26)
4962 #define RCC_PLLxCFGR4_DSMEN BIT(8)
4963 #define RCC_PLLxCFGR4_FOUTPOSTDIVEN BIT(9)
4964 #define RCC_PLLxCFGR4_BYPASS BIT(10)