Lines Matching refs:ctx
209 static int saes_start(struct stm32_saes_context *ctx) in saes_start() argument
214 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
216 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
219 while ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) == _SAES_SR_BUSY) { in saes_start()
229 static void saes_end(struct stm32_saes_context *ctx, int prev_error) in saes_end() argument
233 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
235 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
239 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_end()
242 static void saes_write_iv(struct stm32_saes_context *ctx) in saes_write_iv() argument
245 if (does_chaining_mode_need_iv(ctx->cr)) { in saes_write_iv()
250 mmio_write_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t), ctx->iv[i]); in saes_write_iv()
256 static void saes_write_key(struct stm32_saes_context *ctx) in saes_write_key() argument
259 if ((ctx->cr & _SAES_CR_KEYSEL_MASK) == (_SAES_CR_KEYSEL_SOFT << _SAES_CR_KEYSEL_SHIFT)) { in saes_write_key()
263 mmio_write_32(ctx->base + _SAES_KEYR0 + i * sizeof(uint32_t), ctx->key[i]); in saes_write_key()
266 if ((ctx->cr & _SAES_CR_KEYSIZE) == _SAES_CR_KEYSIZE) { in saes_write_key()
268 mmio_write_32(ctx->base + _SAES_KEYR4 + i * sizeof(uint32_t), in saes_write_key()
269 ctx->key[i + 4U]); in saes_write_key()
275 static int saes_prepare_key(struct stm32_saes_context *ctx) in saes_prepare_key() argument
278 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
281 if ((ctx->cr & _SAES_CR_KEYSIZE) != 0U) { in saes_prepare_key()
282 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
284 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
287 saes_write_key(ctx); in saes_prepare_key()
290 if ((IS_CHAINING_MODE(ECB, ctx->cr) || IS_CHAINING_MODE(CBC, ctx->cr)) && in saes_prepare_key()
291 is_decrypt(ctx->cr)) { in saes_prepare_key()
295 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
299 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
302 ret = wait_computation_completed(ctx->base); in saes_prepare_key()
307 clear_computation_completed(ctx->base); in saes_prepare_key()
310 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
317 static int save_context(struct stm32_saes_context *ctx) in save_context() argument
319 if ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_CCF) != 0U) { in save_context()
325 ctx->cr = mmio_read_32(ctx->base + _SAES_CR); in save_context()
328 if (does_chaining_mode_need_iv(ctx->cr)) { in save_context()
333 ctx->iv[i] = mmio_read_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t)); in save_context()
338 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in save_context()
344 static int restore_context(struct stm32_saes_context *ctx) in restore_context() argument
349 if ((mmio_read_32(ctx->base + _SAES_CR) & _SAES_CR_EN) != 0U) { in restore_context()
355 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in restore_context()
358 mmio_write_32(ctx->base + _SAES_CR, ctx->cr); in restore_context()
361 ret = saes_prepare_key(ctx); in restore_context()
366 saes_write_iv(ctx); in restore_context()
369 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in restore_context()
415 int stm32_saes_init(struct stm32_saes_context *ctx, bool is_dec, in stm32_saes_init() argument
423 ctx->assoc_len = 0U; in stm32_saes_init()
424 ctx->load_len = 0U; in stm32_saes_init()
426 ctx->base = saes_pdata.base; in stm32_saes_init()
427 ctx->cr = _SAES_CR_RESET_VALUE; in stm32_saes_init()
438 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_MODE_MASK, in stm32_saes_init()
442 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_MODE_MASK, in stm32_saes_init()
449 SET_CHAINING_MODE(ECB, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
452 SET_CHAINING_MODE(CBC, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
455 SET_CHAINING_MODE(CTR, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
458 SET_CHAINING_MODE(GCM, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
461 SET_CHAINING_MODE(CCM, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
475 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_DATATYPE_MASK, in stm32_saes_init()
481 mmio_clrbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSIZE); in stm32_saes_init()
484 mmio_setbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSIZE); in stm32_saes_init()
493 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
500 mmio_write_32((uintptr_t)(ctx->key + i), htobe32(key_u32[3 - i])); in stm32_saes_init()
508 mmio_write_32((uintptr_t)(ctx->key + i), htobe32(key_u32[7 - i])); in stm32_saes_init()
520 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
524 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
528 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
532 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
547 mmio_write_32((uintptr_t)(ctx->iv + i), htobe32(iv_u32[3 - i])); in stm32_saes_init()
552 return saes_start(ctx); in stm32_saes_init()
564 int stm32_saes_update_assodata(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update_assodata() argument
576 ret = restore_context(ctx); in stm32_saes_update_assodata()
581 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
586 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
595 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_assodata()
599 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_assodata()
606 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 0U]); in stm32_saes_update_assodata()
607 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 1U]); in stm32_saes_update_assodata()
608 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 2U]); in stm32_saes_update_assodata()
609 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 3U]); in stm32_saes_update_assodata()
611 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
616 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
620 ctx->assoc_len += AES_BLOCK_SIZE_BIT; in stm32_saes_update_assodata()
632 saes_end(ctx, ret); in stm32_saes_update_assodata()
648 int stm32_saes_update_load(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update_load() argument
663 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_update_load()
671 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_load()
679 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_load()
687 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update_load()
688 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update_load()
689 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update_load()
690 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update_load()
692 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
698 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
699 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
700 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
701 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
703 clear_computation_completed(ctx->base); in stm32_saes_update_load()
707 ctx->load_len += AES_BLOCK_SIZE_BIT; in stm32_saes_update_load()
717 mmio_write_32(ctx->base + _SAES_DINR, block_in[0U]); in stm32_saes_update_load()
718 mmio_write_32(ctx->base + _SAES_DINR, block_in[1U]); in stm32_saes_update_load()
719 mmio_write_32(ctx->base + _SAES_DINR, block_in[2U]); in stm32_saes_update_load()
720 mmio_write_32(ctx->base + _SAES_DINR, block_in[3U]); in stm32_saes_update_load()
722 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
729 block_out[0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
730 block_out[1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
731 block_out[2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
732 block_out[3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
734 clear_computation_completed(ctx->base); in stm32_saes_update_load()
738 ctx->load_len += (data_size - i) * UINT8_BIT; in stm32_saes_update_load()
743 saes_end(ctx, ret); in stm32_saes_update_load()
757 int stm32_saes_final(struct stm32_saes_context *ctx, uint8_t *tag, in stm32_saes_final() argument
764 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_final()
766 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_final()
773 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_final()
777 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
778 mmio_write_32(ctx->base + _SAES_DINR, ctx->assoc_len); in stm32_saes_final()
779 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
780 mmio_write_32(ctx->base + _SAES_DINR, ctx->load_len); in stm32_saes_final()
782 ret = wait_computation_completed(ctx->base); in stm32_saes_final()
788 tag_u32[0] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
789 tag_u32[1] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
790 tag_u32[2] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
791 tag_u32[3] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
793 clear_computation_completed(ctx->base); in stm32_saes_final()
798 saes_end(ctx, ret); in stm32_saes_final()
813 int stm32_saes_update(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update() argument
841 if (last_block && IS_CHAINING_MODE(CBC, ctx->cr) && is_encrypt(ctx->cr) && in stm32_saes_update()
853 ret = restore_context(ctx); in stm32_saes_update()
863 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update()
864 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update()
865 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update()
866 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update()
868 ret = wait_computation_completed(ctx->base); in stm32_saes_update()
874 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
875 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
876 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
877 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
879 clear_computation_completed(ctx->base); in stm32_saes_update()
893 ret = save_context(ctx); in stm32_saes_update()
899 saes_end(ctx, ret); in stm32_saes_update()