Lines Matching refs:base
164 if ((info.base == 0U) || (info.clock < 0) || (info.reset < 0)) { in stm32_saes_parse_fdt()
168 pdata->base = (uintptr_t)info.base; in stm32_saes_parse_fdt()
190 static int wait_computation_completed(uintptr_t base) in wait_computation_completed() argument
194 while ((mmio_read_32(base + _SAES_SR) & _SAES_SR_CCF) != _SAES_SR_CCF) { in wait_computation_completed()
204 static void clear_computation_completed(uintptr_t base) in clear_computation_completed() argument
206 mmio_setbits_32(base + _SAES_ICR, _SAES_I_CC); in clear_computation_completed()
214 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
216 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
219 while ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) == _SAES_SR_BUSY) { in saes_start()
233 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
235 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
239 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_end()
250 mmio_write_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t), ctx->iv[i]); in saes_write_iv()
263 mmio_write_32(ctx->base + _SAES_KEYR0 + i * sizeof(uint32_t), ctx->key[i]); in saes_write_key()
268 mmio_write_32(ctx->base + _SAES_KEYR4 + i * sizeof(uint32_t), in saes_write_key()
278 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
282 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
284 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
295 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
299 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
302 ret = wait_computation_completed(ctx->base); in saes_prepare_key()
307 clear_computation_completed(ctx->base); in saes_prepare_key()
310 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
319 if ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_CCF) != 0U) { in save_context()
325 ctx->cr = mmio_read_32(ctx->base + _SAES_CR); in save_context()
333 ctx->iv[i] = mmio_read_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t)); in save_context()
338 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in save_context()
349 if ((mmio_read_32(ctx->base + _SAES_CR) & _SAES_CR_EN) != 0U) { in restore_context()
355 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in restore_context()
358 mmio_write_32(ctx->base + _SAES_CR, ctx->cr); in restore_context()
369 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in restore_context()
426 ctx->base = saes_pdata.base; in stm32_saes_init()
581 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
586 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
595 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_assodata()
599 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_assodata()
606 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 0U]); in stm32_saes_update_assodata()
607 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 1U]); in stm32_saes_update_assodata()
608 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 2U]); in stm32_saes_update_assodata()
609 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 3U]); in stm32_saes_update_assodata()
611 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
616 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
663 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_update_load()
671 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_load()
679 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_load()
687 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update_load()
688 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update_load()
689 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update_load()
690 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update_load()
692 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
698 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
699 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
700 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
701 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
703 clear_computation_completed(ctx->base); in stm32_saes_update_load()
717 mmio_write_32(ctx->base + _SAES_DINR, block_in[0U]); in stm32_saes_update_load()
718 mmio_write_32(ctx->base + _SAES_DINR, block_in[1U]); in stm32_saes_update_load()
719 mmio_write_32(ctx->base + _SAES_DINR, block_in[2U]); in stm32_saes_update_load()
720 mmio_write_32(ctx->base + _SAES_DINR, block_in[3U]); in stm32_saes_update_load()
722 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
729 block_out[0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
730 block_out[1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
731 block_out[2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
732 block_out[3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
734 clear_computation_completed(ctx->base); in stm32_saes_update_load()
764 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_final()
766 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_final()
773 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_final()
777 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
778 mmio_write_32(ctx->base + _SAES_DINR, ctx->assoc_len); in stm32_saes_final()
779 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
780 mmio_write_32(ctx->base + _SAES_DINR, ctx->load_len); in stm32_saes_final()
782 ret = wait_computation_completed(ctx->base); in stm32_saes_final()
788 tag_u32[0] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
789 tag_u32[1] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
790 tag_u32[2] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
791 tag_u32[3] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
793 clear_computation_completed(ctx->base); in stm32_saes_final()
863 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update()
864 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update()
865 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update()
866 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update()
868 ret = wait_computation_completed(ctx->base); in stm32_saes_update()
874 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
875 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
876 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
877 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
879 clear_computation_completed(ctx->base); in stm32_saes_update()