61 static struct stm32_rng_instance stm32_rng;  variable
68 	mmio_clrbits_32(stm32_rng.base + RNG_SR, RNG_SR_SEIS);  in seed_error_recovery()
74 		(void)mmio_read_32(stm32_rng.base + RNG_DR);  in seed_error_recovery()
80 	if ((mmio_read_32(stm32_rng.base + RNG_SR) & RNG_SR_SEIS) != 0U) {  in seed_error_recovery()
91 	clock_rate = clk_get_rate(stm32_rng.clock);  in stm32_rng_clock_freq_restrain()
102 	VERBOSE("RNG clk rate : %lu\n", clk_get_rate(stm32_rng.clock) >> clock_div);  in stm32_rng_clock_freq_restrain()
114 	mmio_write_32(stm32_rng.base + RNG_CR, RNG_CR_RNGEN | RNG_CR_CED);  in stm32_rng_enable()
121 	mmio_clrsetbits_32(stm32_rng.base + RNG_CR, RNG_NIST_CONFIG_MASK,  in stm32_rng_enable()
124 	mmio_clrsetbits_32(stm32_rng.base + RNG_CR, RNG_CR_CLKDIV,  in stm32_rng_enable()
127 	mmio_clrsetbits_32(stm32_rng.base + RNG_CR, RNG_CR_CONDRST, RNG_CR_RNGEN);  in stm32_rng_enable()
130 	sr = mmio_read_32(stm32_rng.base + RNG_SR);  in stm32_rng_enable()
143 		sr = mmio_read_32(stm32_rng.base + RNG_SR);  in stm32_rng_enable()
166 	if (stm32_rng.base == 0U) {  in stm32_rng_read()
173 			uint32_t status = mmio_read_32(stm32_rng.base + RNG_SR);  in stm32_rng_read()
185 		} while ((mmio_read_32(stm32_rng.base + RNG_SR) &  in stm32_rng_read()
190 			if ((mmio_read_32(stm32_rng.base + RNG_SR) & RNG_SR_DRDY) == 0U) {  in stm32_rng_read()
194 			data32 = mmio_read_32(stm32_rng.base + RNG_DR);  in stm32_rng_read()
225 	if (stm32_rng.base != 0U) {  in stm32_rng_init()
245 	stm32_rng.base = dt_rng.base;  in stm32_rng_init()
251 	stm32_rng.clock = (unsigned long)dt_rng.clock;  in stm32_rng_init()
252 	clk_enable(stm32_rng.clock);  in stm32_rng_init()