Lines Matching refs:idx
174 int _clk_stm32_get_parent_by_index(struct stm32_clk_priv *priv, int clk_id, int idx);
200 unsigned long clk_stm32_divider_recalc(struct stm32_clk_priv *priv, int idx,
203 int clk_stm32_gate_enable(struct stm32_clk_priv *priv, int idx);
204 void clk_stm32_gate_disable(struct stm32_clk_priv *priv, int idx);
207 bool clk_stm32_gate_is_enabled(struct stm32_clk_priv *priv, int idx);
224 #define STM32_DIV(idx, _binding, _parent, _flags, _div_id) \ argument
225 [(idx)] = (struct clk_stm32){ \
239 #define STM32_GATE(idx, _binding, _parent, _flags, _gate_id) \ argument
240 [(idx)] = (struct clk_stm32){ \
258 #define FIXED_FACTOR(idx, _idx, _parent, _mult, _div) \ argument
259 [(idx)] = (struct clk_stm32){ \
269 #define GATE(idx, _binding, _parent, _flags, _offset, _bit_idx) \ argument
270 [(idx)] = (struct clk_stm32){ \
281 #define STM32_MUX(idx, _binding, _mux_id, _flags) \ argument
282 [(idx)] = (struct clk_stm32){ \
295 #define CK_TIMER(idx, _idx, _parent, _flags, _apbdiv, _timpre) \ argument
296 [(idx)] = (struct clk_stm32){ \
311 #define CLK_FIXED_RATE(idx, _binding, _rate) \ argument
312 [(idx)] = (struct clk_stm32){ \
361 #define CLK_OSC(idx, _idx, _parent, _osc_id) \ argument
362 [(idx)] = (struct clk_stm32){ \
372 #define CLK_OSC_FIXED(idx, _idx, _parent, _osc_id) \ argument
373 [(idx)] = (struct clk_stm32){ \