Lines Matching refs:parent
305 pid = priv->clks[clk].parent; in _clk_stm32_set_parent()
349 const struct parent_cfg *parent; in clk_mux_get_parent() local
357 parent = &priv->parents[mux_id]; in clk_mux_get_parent()
358 mux = parent->mux; in clk_mux_get_parent()
369 pid = priv->clks[clk].parent; in _clk_stm32_set_parent_by_index()
381 const struct parent_cfg *parent; in _clk_stm32_get_parent() local
385 mux_id = priv->clks[clk_id].parent; in _clk_stm32_get_parent()
395 parent = &priv->parents[mux_id]; in _clk_stm32_get_parent()
403 if ((sel >= 0) && (sel < parent->num_parents)) { in _clk_stm32_get_parent()
404 return parent->id_parents[sel]; in _clk_stm32_get_parent()
414 mux_id = priv->clks[clk_id].parent; in _clk_stm32_get_parent_index()
430 const struct parent_cfg *parent; in _clk_stm32_get_parent_by_index() local
433 mux_id = priv->clks[clk_id].parent; in _clk_stm32_get_parent_by_index()
443 parent = &priv->parents[mux_id]; in _clk_stm32_get_parent_by_index()
445 if (idx < parent->num_parents) { in _clk_stm32_get_parent_by_index()
446 return parent->id_parents[idx]; in _clk_stm32_get_parent_by_index()
468 int parent; in _clk_stm32_get_rate() local
474 parent = _clk_stm32_get_parent(priv, id); in _clk_stm32_get_rate()
475 if (parent < 0) { in _clk_stm32_get_rate()
482 if (parent != CLK_IS_ROOT) { in _clk_stm32_get_rate()
483 prate = _clk_stm32_get_rate(priv, parent); in _clk_stm32_get_rate()
489 if (parent == CLK_IS_ROOT) { in _clk_stm32_get_rate()
493 return _clk_stm32_get_rate(priv, parent); in _clk_stm32_get_rate()
534 int parent; in _clk_stm32_enable_core() local
538 parent = _clk_stm32_get_parent(priv, id); in _clk_stm32_enable_core()
539 if (parent < 0) { in _clk_stm32_enable_core()
540 return parent; in _clk_stm32_enable_core()
542 if (parent != CLK_IS_ROOT) { in _clk_stm32_enable_core()
543 ret = _clk_stm32_enable_core(priv, parent); in _clk_stm32_enable_core()
583 int parent; in _clk_stm32_disable_core() local
605 parent = _clk_stm32_get_parent(priv, id); in _clk_stm32_disable_core()
606 if ((parent >= 0) && (parent != CLK_IS_ROOT)) { in _clk_stm32_disable_core()
607 _clk_stm32_disable_core(priv, parent); in _clk_stm32_disable_core()