Lines Matching refs:msg_blk
612 const struct ddr4r1d *msg_blk; in prog_acsm_playback() local
622 msg_blk = msg; in prog_acsm_playback()
623 f0rc0a = (msg_blk->f0rc0a_d0 & U(0xf)) | U(0xa0); in prog_acsm_playback()
624 f0rc3x = (msg_blk->f0rc3x_d0 & U(0xff)) | U(0x300); in prog_acsm_playback()
837 struct ddr4u1d *msg_blk = msg_1d; in phy_gen2_msg_init() local
846 msg_blk->dram_type = U(0x2); in phy_gen2_msg_init()
849 msg_blk->dram_type = U(0x4); in phy_gen2_msg_init()
852 msg_blk->dram_type = U(0x5); in phy_gen2_msg_init()
858 msg_blk->pstate = 0U; in phy_gen2_msg_init()
861 msg_blk->reserved00 = U(0x20); in phy_gen2_msg_init()
864 msg_blk->reserved00 |= U(0x40); in phy_gen2_msg_init()
867 msg_blk->reserved1c[3] = U(0x3); in phy_gen2_msg_init()
870 msg_blk->sequence_ctrl = U(0x3f1f); in phy_gen2_msg_init()
872 msg_blk->sequence_ctrl = U(0x031f); in phy_gen2_msg_init()
874 msg_blk->phy_config_override = 0U; in phy_gen2_msg_init()
876 msg_blk->hdt_ctrl = U(0x5); in phy_gen2_msg_init()
878 msg_blk->hdt_ctrl = U(0xc9); in phy_gen2_msg_init()
880 msg_blk->msg_misc = U(0x0); in phy_gen2_msg_init()
881 msg_blk->dfimrlmargin = U(0x1); in phy_gen2_msg_init()
882 msg_blk->phy_vref = input->vref ? input->vref : U(0x61); in phy_gen2_msg_init()
883 msg_blk->cs_present = input->cs_d0 | input->cs_d1; in phy_gen2_msg_init()
884 msg_blk->cs_present_d0 = input->cs_d0; in phy_gen2_msg_init()
885 msg_blk->cs_present_d1 = input->cs_d1; in phy_gen2_msg_init()
887 msg_blk->addr_mirror = U(0x0a); /* odd CS are mirrored */ in phy_gen2_msg_init()
889 msg_blk->share2dvref_result = 1U; in phy_gen2_msg_init()
891 msg_blk->acsm_odt_ctrl0 = input->odt[0]; in phy_gen2_msg_init()
892 msg_blk->acsm_odt_ctrl1 = input->odt[1]; in phy_gen2_msg_init()
893 msg_blk->acsm_odt_ctrl2 = input->odt[2]; in phy_gen2_msg_init()
894 msg_blk->acsm_odt_ctrl3 = input->odt[3]; in phy_gen2_msg_init()
895 msg_blk->enabled_dqs = (input->basic.num_active_dbyte_dfi0 + in phy_gen2_msg_init()
897 msg_blk->x16present = input->basic.dram_data_width == 0x10 ? in phy_gen2_msg_init()
898 msg_blk->cs_present : 0; in phy_gen2_msg_init()
899 msg_blk->d4misc = U(0x1); in phy_gen2_msg_init()
900 msg_blk->cs_setup_gddec = U(0x1); in phy_gen2_msg_init()
901 msg_blk->rtt_nom_wr_park0 = 0U; in phy_gen2_msg_init()
902 msg_blk->rtt_nom_wr_park1 = 0U; in phy_gen2_msg_init()
903 msg_blk->rtt_nom_wr_park2 = 0U; in phy_gen2_msg_init()
904 msg_blk->rtt_nom_wr_park3 = 0U; in phy_gen2_msg_init()
905 msg_blk->rtt_nom_wr_park4 = 0U; in phy_gen2_msg_init()
906 msg_blk->rtt_nom_wr_park5 = 0U; in phy_gen2_msg_init()
907 msg_blk->rtt_nom_wr_park6 = 0U; in phy_gen2_msg_init()
908 msg_blk->rtt_nom_wr_park7 = 0U; in phy_gen2_msg_init()
909 msg_blk->mr0 = input->mr[0]; in phy_gen2_msg_init()
910 msg_blk->mr1 = input->mr[1]; in phy_gen2_msg_init()
911 msg_blk->mr2 = input->mr[2]; in phy_gen2_msg_init()
912 msg_blk->mr3 = input->mr[3]; in phy_gen2_msg_init()
913 msg_blk->mr4 = input->mr[4]; in phy_gen2_msg_init()
914 msg_blk->mr5 = input->mr[5]; in phy_gen2_msg_init()
915 msg_blk->mr6 = input->mr[6]; in phy_gen2_msg_init()
916 if ((msg_blk->mr4 & U(0x1c0)) != 0U) { in phy_gen2_msg_init()
920 msg_blk->alt_cas_l = 0U; in phy_gen2_msg_init()
921 msg_blk->alt_wcas_l = 0U; in phy_gen2_msg_init()
923 msg_blk->dramfreq = input->basic.frequency * 2U; in phy_gen2_msg_init()
924 msg_blk->pll_bypass_en = input->basic.pll_bypass; in phy_gen2_msg_init()
925 msg_blk->dfi_freq_ratio = input->basic.dfi_freq_ratio == 0U ? 1U : in phy_gen2_msg_init()
928 msg_blk->bpznres_val = input->adv.ext_cal_res_val; in phy_gen2_msg_init()
929 msg_blk->disabled_dbyte = 0U; in phy_gen2_msg_init()
931 debug("msg_blk->dram_type = 0x%x\n", msg_blk->dram_type); in phy_gen2_msg_init()
932 debug("msg_blk->sequence_ctrl = 0x%x\n", msg_blk->sequence_ctrl); in phy_gen2_msg_init()
933 debug("msg_blk->phy_cfg = 0x%x\n", msg_blk->phy_cfg); in phy_gen2_msg_init()
934 debug("msg_blk->x16present = 0x%x\n", msg_blk->x16present); in phy_gen2_msg_init()
935 debug("msg_blk->dramfreq = 0x%x\n", msg_blk->dramfreq); in phy_gen2_msg_init()
936 debug("msg_blk->pll_bypass_en = 0x%x\n", msg_blk->pll_bypass_en); in phy_gen2_msg_init()
937 debug("msg_blk->dfi_freq_ratio = 0x%x\n", msg_blk->dfi_freq_ratio); in phy_gen2_msg_init()
939 msg_blk->phy_odt_impedance); in phy_gen2_msg_init()
941 msg_blk->phy_drv_impedance); in phy_gen2_msg_init()
942 debug("msg_blk->bpznres_val = 0x%x\n", msg_blk->bpznres_val); in phy_gen2_msg_init()
943 debug("msg_blk->enabled_dqs = 0x%x\n", msg_blk->enabled_dqs); in phy_gen2_msg_init()
944 debug("msg_blk->acsm_odt_ctrl0 = 0x%x\n", msg_blk->acsm_odt_ctrl0); in phy_gen2_msg_init()
945 debug("msg_blk->acsm_odt_ctrl1 = 0x%x\n", msg_blk->acsm_odt_ctrl1); in phy_gen2_msg_init()
946 debug("msg_blk->acsm_odt_ctrl2 = 0x%x\n", msg_blk->acsm_odt_ctrl2); in phy_gen2_msg_init()
947 debug("msg_blk->acsm_odt_ctrl3 = 0x%x\n", msg_blk->acsm_odt_ctrl3); in phy_gen2_msg_init()
952 msg_blk_r = (struct ddr4r1d *)msg_blk; in phy_gen2_msg_init()
992 msg_blk_lr = (struct ddr4lr1d *)msg_blk; in phy_gen2_msg_init()
1002 memcpy(msg_blk_2d, msg_blk, sizeof(struct ddr4u1d)); in phy_gen2_msg_init()
1016 msg_blk->phy_cfg = (((msg_blk->mr3 & U(0x8)) != 0U) || in phy_gen2_msg_init()
1106 const struct ddr4lr1d *msg_blk; in prog_dfi_rd_data_cs_dest_map() local
1126 msg_blk = msg; in prog_dfi_rd_data_cs_dest_map()
1132 if ((msg_blk->msg_misc & U(0x40)) != 0U) { in prog_dfi_rd_data_cs_dest_map()