Lines Matching refs:input
609 const struct input *input, const void *msg) in prog_acsm_playback() argument
618 if (input->basic.dimm_type != RDIMM) { in prog_acsm_playback()
625 f0rc5x = (input->adv.phy_gen2_umctl_f0rc5x & U(0xff)) | U(0x500); in prog_acsm_playback()
642 const struct input *input) in prog_acsm_ctr() argument
644 if (input->basic.dimm_type != RDIMM) { in prog_acsm_ctr()
656 const struct input *input) in prog_cal_rate_run() argument
663 cal_interval = input->adv.cal_interval; in prog_cal_rate_run()
664 cal_once = input->adv.cal_once; in prog_cal_rate_run()
673 const struct input *input) in prog_seq0bdly0() argument
682 frq = input->basic.frequency >> 1; in prog_seq0bdly0()
684 if (input->basic.frequency < 400) { in prog_seq0bdly0()
685 lower_freq_opt = (input->basic.dimm_type == RDIMM) ? 7 : 3; in prog_seq0bdly0()
686 } else if (input->basic.frequency < 533) { in prog_seq0bdly0()
687 lower_freq_opt = (input->basic.dimm_type == RDIMM) ? 14 : 11; in prog_seq0bdly0()
733 const struct input *input, in i_load_pie() argument
749 load_pieimage(phy, input->basic.dimm_type); in i_load_pie()
751 prog_seq0bdly0(phy, input); in i_load_pie()
765 input->basic.dimm_type == RDIMM && in i_load_pie()
766 input->adv.phy_gen2_umctl_opt == 1U ? in i_load_pie()
770 prog_acsm_playback(phy, input, msg); /* rdimm */ in i_load_pie()
771 prog_acsm_ctr(phy, input); /* rdimm */ in i_load_pie()
774 prog_cal_rate_run(phy, input); in i_load_pie()
777 input->basic.dimm_type == RDIMM ? U(0x2) : 0U); in i_load_pie()
783 static void phy_gen2_init_input(struct input *input) in phy_gen2_init_input() argument
787 input->adv.dram_byte_swap = 0; in phy_gen2_init_input()
788 input->adv.ext_cal_res_val = 0; in phy_gen2_init_input()
789 input->adv.tx_slew_rise_dq = 0xf; in phy_gen2_init_input()
790 input->adv.tx_slew_fall_dq = 0xf; in phy_gen2_init_input()
791 input->adv.tx_slew_rise_ac = 0xf; in phy_gen2_init_input()
792 input->adv.tx_slew_fall_ac = 0xf; in phy_gen2_init_input()
793 input->adv.mem_alert_en = 0; in phy_gen2_init_input()
794 input->adv.mem_alert_puimp = 5; in phy_gen2_init_input()
795 input->adv.mem_alert_vref_level = 0x29; in phy_gen2_init_input()
796 input->adv.mem_alert_sync_bypass = 0; in phy_gen2_init_input()
797 input->adv.cal_interval = 0x9; in phy_gen2_init_input()
798 input->adv.cal_once = 0; in phy_gen2_init_input()
799 input->adv.dis_dyn_adr_tri = 0; in phy_gen2_init_input()
800 input->adv.is2ttiming = 0; in phy_gen2_init_input()
801 input->adv.d4rx_preamble_length = 0; in phy_gen2_init_input()
802 input->adv.d4tx_preamble_length = 0; in phy_gen2_init_input()
805 debug("mr[%d] = 0x%x\n", i, input->mr[i]); in phy_gen2_init_input()
808 debug("input->cs_d0 = 0x%x\n", input->cs_d0); in phy_gen2_init_input()
809 debug("input->cs_d1 = 0x%x\n", input->cs_d1); in phy_gen2_init_input()
810 debug("input->mirror = 0x%x\n", input->mirror); in phy_gen2_init_input()
811 debug("PHY ODT impedance = %d ohm\n", input->adv.odtimpedance); in phy_gen2_init_input()
812 debug("PHY DQ driver impedance = %d ohm\n", input->adv.tx_impedance); in phy_gen2_init_input()
813 debug("PHY Addr driver impedance = %d ohm\n", input->adv.atx_impedance); in phy_gen2_init_input()
816 debug("odt[%d] = 0x%x\n", i, input->odt[i]); in phy_gen2_init_input()
819 if (input->basic.dimm_type == RDIMM) { in phy_gen2_init_input()
821 debug("input->rcw[%d] = 0x%x\n", i, input->rcw[i]); in phy_gen2_init_input()
823 debug("input->rcw3x = 0x%x\n", input->rcw3x); in phy_gen2_init_input()
835 const struct input *input) in phy_gen2_msg_init() argument
842 switch (input->basic.dimm_type) { in phy_gen2_msg_init()
869 if (input->basic.dimm_type == LRDIMM) { in phy_gen2_msg_init()
882 msg_blk->phy_vref = input->vref ? input->vref : U(0x61); in phy_gen2_msg_init()
883 msg_blk->cs_present = input->cs_d0 | input->cs_d1; in phy_gen2_msg_init()
884 msg_blk->cs_present_d0 = input->cs_d0; in phy_gen2_msg_init()
885 msg_blk->cs_present_d1 = input->cs_d1; in phy_gen2_msg_init()
886 if (input->mirror != 0) { in phy_gen2_msg_init()
891 msg_blk->acsm_odt_ctrl0 = input->odt[0]; in phy_gen2_msg_init()
892 msg_blk->acsm_odt_ctrl1 = input->odt[1]; in phy_gen2_msg_init()
893 msg_blk->acsm_odt_ctrl2 = input->odt[2]; in phy_gen2_msg_init()
894 msg_blk->acsm_odt_ctrl3 = input->odt[3]; in phy_gen2_msg_init()
895 msg_blk->enabled_dqs = (input->basic.num_active_dbyte_dfi0 + in phy_gen2_msg_init()
896 input->basic.num_active_dbyte_dfi1) * 8; in phy_gen2_msg_init()
897 msg_blk->x16present = input->basic.dram_data_width == 0x10 ? in phy_gen2_msg_init()
909 msg_blk->mr0 = input->mr[0]; in phy_gen2_msg_init()
910 msg_blk->mr1 = input->mr[1]; in phy_gen2_msg_init()
911 msg_blk->mr2 = input->mr[2]; in phy_gen2_msg_init()
912 msg_blk->mr3 = input->mr[3]; in phy_gen2_msg_init()
913 msg_blk->mr4 = input->mr[4]; in phy_gen2_msg_init()
914 msg_blk->mr5 = input->mr[5]; in phy_gen2_msg_init()
915 msg_blk->mr6 = input->mr[6]; in phy_gen2_msg_init()
923 msg_blk->dramfreq = input->basic.frequency * 2U; in phy_gen2_msg_init()
924 msg_blk->pll_bypass_en = input->basic.pll_bypass; in phy_gen2_msg_init()
925 msg_blk->dfi_freq_ratio = input->basic.dfi_freq_ratio == 0U ? 1U : in phy_gen2_msg_init()
926 input->basic.dfi_freq_ratio == 1U ? 2U : in phy_gen2_msg_init()
928 msg_blk->bpznres_val = input->adv.ext_cal_res_val; in phy_gen2_msg_init()
950 if (input->basic.dimm_type == RDIMM || in phy_gen2_msg_init()
951 input->basic.dimm_type == LRDIMM) { in phy_gen2_msg_init()
954 msg_blk_r->f0rc00_d0 = input->rcw[0]; in phy_gen2_msg_init()
955 msg_blk_r->f0rc01_d0 = input->rcw[1]; in phy_gen2_msg_init()
956 msg_blk_r->f0rc02_d0 = input->rcw[2]; in phy_gen2_msg_init()
957 msg_blk_r->f0rc03_d0 = input->rcw[3]; in phy_gen2_msg_init()
958 msg_blk_r->f0rc04_d0 = input->rcw[4]; in phy_gen2_msg_init()
959 msg_blk_r->f0rc05_d0 = input->rcw[5]; in phy_gen2_msg_init()
960 msg_blk_r->f0rc06_d0 = input->rcw[6]; in phy_gen2_msg_init()
961 msg_blk_r->f0rc07_d0 = input->rcw[7]; in phy_gen2_msg_init()
962 msg_blk_r->f0rc08_d0 = input->rcw[8]; in phy_gen2_msg_init()
963 msg_blk_r->f0rc09_d0 = input->rcw[9]; in phy_gen2_msg_init()
964 msg_blk_r->f0rc0a_d0 = input->rcw[10]; in phy_gen2_msg_init()
965 msg_blk_r->f0rc0b_d0 = input->rcw[11]; in phy_gen2_msg_init()
966 msg_blk_r->f0rc0c_d0 = input->rcw[12]; in phy_gen2_msg_init()
967 msg_blk_r->f0rc0d_d0 = input->rcw[13]; in phy_gen2_msg_init()
968 msg_blk_r->f0rc0e_d0 = input->rcw[14]; in phy_gen2_msg_init()
969 msg_blk_r->f0rc0f_d0 = input->rcw[15]; in phy_gen2_msg_init()
970 msg_blk_r->f0rc3x_d0 = input->rcw3x; in phy_gen2_msg_init()
973 msg_blk_r->f0rc00_d1 = input->rcw[0]; in phy_gen2_msg_init()
974 msg_blk_r->f0rc01_d1 = input->rcw[1]; in phy_gen2_msg_init()
975 msg_blk_r->f0rc02_d1 = input->rcw[2]; in phy_gen2_msg_init()
976 msg_blk_r->f0rc03_d1 = input->rcw[3]; in phy_gen2_msg_init()
977 msg_blk_r->f0rc04_d1 = input->rcw[4]; in phy_gen2_msg_init()
978 msg_blk_r->f0rc05_d1 = input->rcw[5]; in phy_gen2_msg_init()
979 msg_blk_r->f0rc06_d1 = input->rcw[6]; in phy_gen2_msg_init()
980 msg_blk_r->f0rc07_d1 = input->rcw[7]; in phy_gen2_msg_init()
981 msg_blk_r->f0rc08_d1 = input->rcw[8]; in phy_gen2_msg_init()
982 msg_blk_r->f0rc09_d1 = input->rcw[9]; in phy_gen2_msg_init()
983 msg_blk_r->f0rc0a_d1 = input->rcw[10]; in phy_gen2_msg_init()
984 msg_blk_r->f0rc0b_d1 = input->rcw[11]; in phy_gen2_msg_init()
985 msg_blk_r->f0rc0c_d1 = input->rcw[12]; in phy_gen2_msg_init()
986 msg_blk_r->f0rc0d_d1 = input->rcw[13]; in phy_gen2_msg_init()
987 msg_blk_r->f0rc0e_d1 = input->rcw[14]; in phy_gen2_msg_init()
988 msg_blk_r->f0rc0f_d1 = input->rcw[15]; in phy_gen2_msg_init()
989 msg_blk_r->f0rc3x_d1 = input->rcw3x; in phy_gen2_msg_init()
991 if (input->basic.dimm_type == LRDIMM) { in phy_gen2_msg_init()
1001 if (input->basic.train2d != 0) { in phy_gen2_msg_init()
1018 : input->adv.is2ttiming; in phy_gen2_msg_init()
1024 const struct input *input) in prog_tx_pre_drv_mode() argument
1033 tx_pre_p = input->adv.tx_slew_rise_dq; in prog_tx_pre_drv_mode()
1034 tx_pre_n = input->adv.tx_slew_fall_dq; in prog_tx_pre_drv_mode()
1039 for (byte = 0; byte < input->basic.num_dbyte; byte++) { in prog_tx_pre_drv_mode()
1051 const struct input *input) in prog_atx_pre_drv_mode() argument
1058 atx_pre_n = input->adv.tx_slew_fall_ac; in prog_atx_pre_drv_mode()
1059 atx_pre_p = input->adv.tx_slew_rise_ac; in prog_atx_pre_drv_mode()
1061 if (input->basic.num_anib == 8) { in prog_atx_pre_drv_mode()
1064 } else if (input->basic.num_anib == 10 || input->basic.num_anib == 12 || in prog_atx_pre_drv_mode()
1065 input->basic.num_anib == 13) { in prog_atx_pre_drv_mode()
1069 ERROR("Invalid number of aNIBs: %d\n", input->basic.num_anib); in prog_atx_pre_drv_mode()
1073 for (anib = 0; anib < input->basic.num_anib; anib++) { in prog_atx_pre_drv_mode()
1089 const struct input *input) in prog_enable_cs_multicast() argument
1093 if (input->basic.dimm_type != RDIMM && in prog_enable_cs_multicast()
1094 input->basic.dimm_type != LRDIMM) { in prog_enable_cs_multicast()
1098 phy_io_write16(phy, addr, input->adv.cast_cs_to_cid); in prog_enable_cs_multicast()
1103 const struct input *input, in prog_dfi_rd_data_cs_dest_map() argument
1128 switch (input->basic.dimm_type) { in prog_dfi_rd_data_cs_dest_map()
1172 const struct input *input) in prog_pll_ctrl() argument
1196 const struct input *input) in prog_pll_ctrl2() argument
1201 if (input->basic.frequency / 2 < 235) { in prog_pll_ctrl2()
1203 } else if (input->basic.frequency / 2 < 313) { in prog_pll_ctrl2()
1205 } else if (input->basic.frequency / 2 < 469) { in prog_pll_ctrl2()
1207 } else if (input->basic.frequency / 2 < 625) { in prog_pll_ctrl2()
1209 } else if (input->basic.frequency / 2 < 938) { in prog_pll_ctrl2()
1211 } else if (input->basic.frequency / 2 < 1067) { in prog_pll_ctrl2()
1222 static void prog_dll_lck_param(uint16_t *phy, const struct input *input) in prog_dll_lck_param() argument
1230 static void prog_dll_gain_ctl(uint16_t *phy, const struct input *input) in prog_dll_gain_ctl() argument
1239 const struct input *input) in prog_pll_pwr_dn() argument
1250 const struct input *input) in prog_ard_ptr_init_val() argument
1255 if (input->basic.frequency >= 933) { in prog_ard_ptr_init_val()
1265 const struct input *input) in prog_dqs_preamble_control() argument
1275 int two_tck_tx_dqs_pre = input->adv.d4tx_preamble_length; in prog_dqs_preamble_control()
1276 int two_tck_rx_dqs_pre = input->adv.d4rx_preamble_length; in prog_dqs_preamble_control()
1293 const struct input *input) in prog_proc_odt_time_ctl() argument
1298 if (input->adv.wdqsext != 0) { in prog_proc_odt_time_ctl()
1300 } else if (input->basic.frequency <= 933) { in prog_proc_odt_time_ctl()
1302 } else if (input->basic.frequency <= 1200) { in prog_proc_odt_time_ctl()
1303 if (input->adv.d4rx_preamble_length == 1) { in prog_proc_odt_time_ctl()
1309 if (input->adv.d4rx_preamble_length == 1) { in prog_proc_odt_time_ctl()
1383 const struct input *input) in prog_tx_odt_drv_stren() argument
1390 odtstren_p = map_odtstren_p(input->adv.odtimpedance, in prog_tx_odt_drv_stren()
1391 input->basic.hard_macro_ver); in prog_tx_odt_drv_stren()
1398 for (byte = 0; byte < input->basic.num_dbyte; byte++) { in prog_tx_odt_drv_stren()
1458 const struct input *input) in prog_tx_impedance_ctrl1() argument
1465 drv_stren_fsdq_p = map_drvstren_fsdq_p(input->adv.tx_impedance, in prog_tx_impedance_ctrl1()
1466 input->basic.hard_macro_ver); in prog_tx_impedance_ctrl1()
1467 drv_stren_fsdq_n = map_drvstren_fsdq_n(input->adv.tx_impedance, in prog_tx_impedance_ctrl1()
1468 input->basic.hard_macro_ver); in prog_tx_impedance_ctrl1()
1472 for (byte = 0; byte < input->basic.num_dbyte; byte++) { in prog_tx_impedance_ctrl1()
1556 const struct input *input) in prog_atx_impedance() argument
1564 if (input->basic.hard_macro_ver == 4 && in prog_atx_impedance()
1565 input->adv.atx_impedance == 20) { in prog_atx_impedance()
1570 adrv_stren_p = map_adrv_stren_p(input->adv.atx_impedance, in prog_atx_impedance()
1571 input->basic.hard_macro_ver); in prog_atx_impedance()
1572 adrv_stren_n = map_adrv_stren_n(input->adv.atx_impedance, in prog_atx_impedance()
1573 input->basic.hard_macro_ver); in prog_atx_impedance()
1576 for (anib = 0; anib < input->basic.num_anib; anib++) { in prog_atx_impedance()
1584 const struct input *input) in prog_dfi_mode() argument
1589 if (input->basic.dfi1exists == 1) { in prog_dfi_mode()
1598 static void prog_acx4_anib_dis(uint16_t *phy, const struct input *input) in prog_acx4_anib_dis() argument
1608 const struct input *input) in prog_dfi_camode() argument
1617 const struct input *input) in prog_cal_drv_str0() argument
1624 cal_drv_str_pu50 = input->adv.ext_cal_res_val; in prog_cal_drv_str0()
1633 const struct input *input) in prog_cal_uclk_info() argument
1638 cal_uclk_ticks_per1u_s = input->basic.frequency >> 1; in prog_cal_uclk_info()
1648 const struct input *input) in prog_cal_rate() argument
1655 cal_interval = input->adv.cal_interval; in prog_cal_rate()
1656 cal_once = input->adv.cal_once; in prog_cal_rate()
1664 const struct input *input, in prog_vref_in_global() argument
1686 const struct input *input) in prog_dq_dqs_rcv_cntrl() argument
1706 for (byte = 0; byte < input->basic.num_dbyte; byte++) { in prog_dq_dqs_rcv_cntrl()
1718 const struct input *input) in prog_mem_alert_control() argument
1730 if (input->basic.dram_type == DDR4 && input->adv.mem_alert_en == 1) { in prog_mem_alert_control()
1733 malertpu_stren = input->adv.mem_alert_puimp; in prog_mem_alert_control()
1734 malertvref_level = input->adv.mem_alert_vref_level; in prog_mem_alert_control()
1735 malertsync_bypass = input->adv.mem_alert_sync_bypass; in prog_mem_alert_control()
1751 const struct input *input) in prog_dfi_freq_ratio() argument
1756 dfi_freq_ratio = input->basic.dfi_freq_ratio; in prog_dfi_freq_ratio()
1761 const struct input *input) in prog_tristate_mode_ca() argument
1769 dis_dyn_adr_tri = input->adv.dis_dyn_adr_tri; in prog_tristate_mode_ca()
1770 ddr2tmode = input->adv.is2ttiming; in prog_tristate_mode_ca()
1778 const struct input *input) in prog_dfi_xlat() argument
1786 pllbypass_dat = input->basic.pll_bypass; /* only [0] is used */ in prog_dfi_xlat()
1801 const struct input *input, in prog_dbyte_misc_mode() argument
1816 for (byte = 0; byte < input->basic.num_dbyte; byte++) { in prog_dbyte_misc_mode()
1818 if (byte <= input->basic.num_active_dbyte_dfi0 - 1) { in prog_dbyte_misc_mode()
1820 if ((input->basic.dram_data_width != 4) && in prog_dbyte_misc_mode()
1837 const struct input *input) in prog_master_x4config() argument
1843 x4tg = input->basic.dram_data_width == 4 ? 0xf : 0; in prog_master_x4config()
1849 const struct input *input, in prog_dmipin_present() argument
1860 const struct input *input) in prog_dfi_phyupd() argument
1873 const struct input *input) in prog_cal_misc2() argument
1895 const struct input *input, in c_init_phy_config() argument
1909 prog_dfi_phyupd(phy, input); in c_init_phy_config()
1910 prog_cal_misc2(phy, input); in c_init_phy_config()
1911 prog_tx_pre_drv_mode(phy, input); in c_init_phy_config()
1912 prog_atx_pre_drv_mode(phy, input); in c_init_phy_config()
1913 prog_enable_cs_multicast(phy, input); /* rdimm and lrdimm */ in c_init_phy_config()
1914 prog_dfi_rd_data_cs_dest_map(phy, ip_rev, input, msg); in c_init_phy_config()
1915 prog_pll_ctrl2(phy, input); in c_init_phy_config()
1920 prog_pll_pwr_dn(phy, input); in c_init_phy_config()
1926 prog_ard_ptr_init_val(phy, input); in c_init_phy_config()
1927 prog_dqs_preamble_control(phy, input); in c_init_phy_config()
1928 prog_dll_lck_param(phy, input); in c_init_phy_config()
1929 prog_dll_gain_ctl(phy, input); in c_init_phy_config()
1930 prog_proc_odt_time_ctl(phy, input); in c_init_phy_config()
1931 prog_tx_odt_drv_stren(phy, input); in c_init_phy_config()
1932 prog_tx_impedance_ctrl1(phy, input); in c_init_phy_config()
1933 prog_atx_impedance(phy, input); in c_init_phy_config()
1934 prog_dfi_mode(phy, input); in c_init_phy_config()
1935 prog_dfi_camode(phy, input); in c_init_phy_config()
1936 prog_cal_drv_str0(phy, input); in c_init_phy_config()
1937 prog_cal_uclk_info(phy, input); in c_init_phy_config()
1938 prog_cal_rate(phy, input); in c_init_phy_config()
1939 prog_vref_in_global(phy, input, msg); in c_init_phy_config()
1940 prog_dq_dqs_rcv_cntrl(phy, input); in c_init_phy_config()
1941 prog_mem_alert_control(phy, input); in c_init_phy_config()
1942 prog_dfi_freq_ratio(phy, input); in c_init_phy_config()
1943 prog_tristate_mode_ca(phy, input); in c_init_phy_config()
1944 prog_dfi_xlat(phy, input); in c_init_phy_config()
1945 prog_dbyte_misc_mode(phy, input, msg); in c_init_phy_config()
1946 prog_master_x4config(phy, input); in c_init_phy_config()
1947 prog_dmipin_present(phy, input, msg); in c_init_phy_config()
1948 prog_acx4_anib_dis(phy, input); in c_init_phy_config()
2146 static int g_exec_fw(uint16_t **phy_ptr, int train2d, struct input *input) in g_exec_fw() argument
2158 prog_pll_ctrl2(phy, input); in g_exec_fw()
2159 prog_pll_ctrl(phy, input); in g_exec_fw()
2203 struct input *input, in load_fw() argument
2218 switch (input->basic.dimm_type) { in load_fw()
2403 static void print_jason_format(struct input *input, in print_jason_format() argument
2409 printf("\n \"dram_type\": \"%s\",", dram_types_str[input->basic.dram_type]); in print_jason_format()
2410 printf("\n \"dimm_type\": \"%s\",", dimm_types_str[input->basic.dimm_type]); in print_jason_format()
2411 printf("\n \"hard_macro_ver\": \"%d\",", input->basic.hard_macro_ver); in print_jason_format()
2412 printf("\n \"num_dbyte\": \"0x%04x\",", (unsigned int)input->basic.num_dbyte); in print_jason_format()
2413 …printf("\n \"num_active_dbyte_dfi0\": \"0x%04x\",", (unsigned int)input->basic.num_active_dbyte… in print_jason_format()
2414 printf("\n \"num_anib\": \"0x%04x\",", (unsigned int)input->basic.num_anib); in print_jason_format()
2415 printf("\n \"num_rank_dfi0\": \"0x%04x\",", (unsigned int)input->basic.num_rank_dfi0); in print_jason_format()
2416 printf("\n \"num_pstates\": \"0x%04x\",", (unsigned int)input->basic.num_pstates); in print_jason_format()
2417 printf("\n \"frequency\": \"%d\",", input->basic.frequency); in print_jason_format()
2418 printf("\n \"pll_bypass\": \"0x%04x\",", (unsigned int)input->basic.dfi_freq_ratio); in print_jason_format()
2419 printf("\n \"dfi_freq_ratio\": \"0x%04x\",", (unsigned int)input->basic.dfi_freq_ratio); in print_jason_format()
2420 printf("\n \"dfi1_exists\": \"0x%04x\",", (unsigned int)input->basic.dfi1exists); in print_jason_format()
2421 printf("\n \"dram_data_width\": \"0x%04x\",", (unsigned int)input->basic.dram_data_width); in print_jason_format()
2422 printf("\n \"dram_byte_swap\": \"0x%04x\",", (unsigned int)input->adv.dram_byte_swap); in print_jason_format()
2423 printf("\n \"ext_cal_res_val\": \"0x%04x\",", (unsigned int)input->adv.ext_cal_res_val); in print_jason_format()
2424 printf("\n \"tx_slew_rise_dq\": \"0x%04x\",", (unsigned int)input->adv.tx_slew_rise_dq); in print_jason_format()
2425 printf("\n \"tx_slew_fall_dq\": \"0x%04x\",", (unsigned int)input->adv.tx_slew_fall_dq); in print_jason_format()
2426 printf("\n \"tx_slew_rise_ac\": \"0x%04x\",", (unsigned int)input->adv.tx_slew_rise_ac); in print_jason_format()
2427 printf("\n \"tx_slew_fall_ac\": \"0x%04x\",", (unsigned int)input->adv.tx_slew_fall_ac); in print_jason_format()
2428 printf("\n \"odt_impedance\": \"%d\",", input->adv.odtimpedance); in print_jason_format()
2429 printf("\n \"tx_impedance\": \"%d\",", input->adv.tx_impedance); in print_jason_format()
2430 printf("\n \"atx_impedance\": \"%d\",", input->adv.atx_impedance); in print_jason_format()
2431 printf("\n \"mem_alert_en\": \"0x%04x\",", (unsigned int)input->adv.mem_alert_en); in print_jason_format()
2432 printf("\n \"mem_alert_pu_imp\": \"0x%04x\",", (unsigned int)input->adv.mem_alert_puimp); in print_jason_format()
2433 …printf("\n \"mem_alert_vref_level\": \"0x%04x\",", (unsigned int)input->adv.mem_alert_vref_leve… in print_jason_format()
2434 …printf("\n \"mem_alert_sync_bypass\": \"0x%04x\",", (unsigned int)input->adv.mem_alert_sync_byp… in print_jason_format()
2435 printf("\n \"cal_interval\": \"0x%04x\",", (unsigned int)input->adv.cal_interval); in print_jason_format()
2436 printf("\n \"cal_once\": \"0x%04x\",", (unsigned int)input->adv.cal_once); in print_jason_format()
2437 printf("\n \"dis_dyn_adr_tri\": \"0x%04x\",", (unsigned int)input->adv.dis_dyn_adr_tri); in print_jason_format()
2438 printf("\n \"is2t_timing\": \"0x%04x\",", (unsigned int)input->adv.is2ttiming); in print_jason_format()
2439 …printf("\n \"d4rx_preabmle_length\": \"0x%04x\",", (unsigned int)input->adv.d4rx_preamble_lengt… in print_jason_format()
2440 …printf("\n \"d4tx_preamble_length\": \"0x%04x\",", (unsigned int)input->adv.d4tx_preamble_lengt… in print_jason_format()
2490 static struct input input; in compute_ddr_phy() local
2508 zeromem(&input, sizeof(input)); in compute_ddr_phy()
2512 input.basic.dram_type = DDR4; in compute_ddr_phy()
2514 input.basic.dimm_type = (dimm_param->rdimm != 0) ? RDIMM : UDIMM; in compute_ddr_phy()
2515 input.basic.num_dbyte = dimm_param->primary_sdram_width / 8 + in compute_ddr_phy()
2517 input.basic.num_active_dbyte_dfi0 = input.basic.num_dbyte; in compute_ddr_phy()
2518 input.basic.num_rank_dfi0 = dimm_param->n_ranks; in compute_ddr_phy()
2519 input.basic.dram_data_width = dimm_param->device_width; in compute_ddr_phy()
2520 input.basic.hard_macro_ver = 0xa; in compute_ddr_phy()
2521 input.basic.num_pstates = 1; in compute_ddr_phy()
2522 input.basic.dfi_freq_ratio = 1; in compute_ddr_phy()
2523 input.basic.num_anib = 0xc; in compute_ddr_phy()
2524 input.basic.train2d = popts->skip2d ? 0 : 1; in compute_ddr_phy()
2525 input.basic.frequency = (int) (clk / 2000000ul); in compute_ddr_phy()
2526 debug("frequency = %dMHz\n", input.basic.frequency); in compute_ddr_phy()
2527 input.cs_d0 = conf->cs_on_dimm[0]; in compute_ddr_phy()
2529 input.cs_d1 = conf->cs_on_dimm[1]; in compute_ddr_phy()
2531 input.mirror = dimm_param->mirrored_dimm; in compute_ddr_phy()
2532 input.mr[0] = regs->sdram_mode[0] & U(0xffff); in compute_ddr_phy()
2533 input.mr[1] = regs->sdram_mode[0] >> 16U; in compute_ddr_phy()
2534 input.mr[2] = regs->sdram_mode[1] >> 16U; in compute_ddr_phy()
2535 input.mr[3] = regs->sdram_mode[1] & U(0xffff); in compute_ddr_phy()
2536 input.mr[4] = regs->sdram_mode[8] >> 16U; in compute_ddr_phy()
2537 input.mr[5] = regs->sdram_mode[8] & U(0xffff); in compute_ddr_phy()
2538 input.mr[6] = regs->sdram_mode[9] >> 16U; in compute_ddr_phy()
2539 input.vref = popts->vref_phy; in compute_ddr_phy()
2540 debug("Vref_phy = %d percent\n", (input.vref * 100U) >> 7U); in compute_ddr_phy()
2547 parse_odt(odt_rd, true, i, input.cs_d0, input.cs_d1, in compute_ddr_phy()
2548 input.odt); in compute_ddr_phy()
2549 parse_odt(odt_wr, false, i, input.cs_d0, input.cs_d1, in compute_ddr_phy()
2550 input.odt); in compute_ddr_phy()
2557 input.rcw[0] = (regs->sdram_rcw[0] >> 28U) & U(0xf); in compute_ddr_phy()
2558 input.rcw[1] = (regs->sdram_rcw[0] >> 24U) & U(0xf); in compute_ddr_phy()
2559 input.rcw[2] = (regs->sdram_rcw[0] >> 20U) & U(0xf); in compute_ddr_phy()
2560 input.rcw[3] = (regs->sdram_rcw[0] >> 16U) & U(0xf); in compute_ddr_phy()
2561 input.rcw[4] = (regs->sdram_rcw[0] >> 12U) & U(0xf); in compute_ddr_phy()
2562 input.rcw[5] = (regs->sdram_rcw[0] >> 8U) & U(0xf); in compute_ddr_phy()
2563 input.rcw[6] = (regs->sdram_rcw[0] >> 4U) & U(0xf); in compute_ddr_phy()
2564 input.rcw[7] = (regs->sdram_rcw[0] >> 0U) & U(0xf); in compute_ddr_phy()
2565 input.rcw[8] = (regs->sdram_rcw[1] >> 28U) & U(0xf); in compute_ddr_phy()
2566 input.rcw[9] = (regs->sdram_rcw[1] >> 24U) & U(0xf); in compute_ddr_phy()
2567 input.rcw[10] = (regs->sdram_rcw[1] >> 20U) & U(0xf); in compute_ddr_phy()
2568 input.rcw[11] = (regs->sdram_rcw[1] >> 16U) & U(0xf); in compute_ddr_phy()
2569 input.rcw[12] = (regs->sdram_rcw[1] >> 12U) & U(0xf); in compute_ddr_phy()
2570 input.rcw[13] = (regs->sdram_rcw[1] >> 8U) & U(0xf); in compute_ddr_phy()
2571 input.rcw[14] = (regs->sdram_rcw[1] >> 4U) & U(0xf); in compute_ddr_phy()
2572 input.rcw[15] = (regs->sdram_rcw[1] >> 0U) & U(0xf); in compute_ddr_phy()
2573 input.rcw3x = (regs->sdram_rcw[2] >> 8U) & U(0xff); in compute_ddr_phy()
2576 input.adv.odtimpedance = popts->odt ? popts->odt : 60; in compute_ddr_phy()
2577 input.adv.tx_impedance = popts->phy_tx_impedance ? in compute_ddr_phy()
2579 input.adv.atx_impedance = popts->phy_atx_impedance ? in compute_ddr_phy()
2583 phy_gen2_init_input(&input); in compute_ddr_phy()
2586 ret = phy_gen2_msg_init(&msg_1d, &msg_2d, &input); in compute_ddr_phy()
2592 ret = c_init_phy_config(priv->phy, priv->ip_rev, &input, &msg_1d); in compute_ddr_phy()
2605 input.basic.train2d in compute_ddr_phy()
2631 ret = load_fw(priv->phy, &input, 0, &msg_1d, in compute_ddr_phy()
2640 ret = g_exec_fw(priv->phy, 0, &input); in compute_ddr_phy()
2651 get_cdd_val(priv->phy, rank, input.basic.frequency, in compute_ddr_phy()
2658 if ((ret == 0) && (input.basic.train2d != 0)) { in compute_ddr_phy()
2661 ret = load_fw(priv->phy, &input, 1, &msg_2d, in compute_ddr_phy()
2670 ret = g_exec_fw(priv->phy, 1, &input); in compute_ddr_phy()
2689 input.basic.train2d in compute_ddr_phy()
2704 i_load_pie(priv->phy, &input, &msg_1d); in compute_ddr_phy()
2707 input.basic.dimm_type == RDIMM ? "RDIMM" : in compute_ddr_phy()
2708 input.basic.dimm_type == LRDIMM ? "LRDIMM" : in compute_ddr_phy()
2715 print_jason_format(&input, &msg_1d, &msg_2d); in compute_ddr_phy()