Lines Matching defs:ddr4u2d
210 struct ddr4u2d { struct
211 uint8_t reserved00;
212 uint8_t msg_misc;
213 uint16_t pmu_revision;
214 uint8_t pstate;
215 uint8_t pll_bypass_en;
216 uint16_t dramfreq;
217 uint8_t dfi_freq_ratio;
218 uint8_t bpznres_val;
219 uint8_t phy_odt_impedance;
220 uint8_t phy_drv_impedance;
221 uint8_t phy_vref;
222 uint8_t dram_type;
223 uint8_t disabled_dbyte;
224 uint8_t enabled_dqs;
225 uint8_t cs_present;
226 uint8_t cs_present_d0;
227 uint8_t cs_present_d1;
228 uint8_t addr_mirror;
229 uint8_t cs_test_fail;
230 uint8_t phy_cfg;
231 uint16_t sequence_ctrl;
232 uint8_t hdt_ctrl;
233 uint8_t rx2d_train_opt;
234 uint8_t tx2d_train_opt;
235 uint8_t share2dvref_result;
236 uint8_t delay_weight2d;
237 uint8_t voltage_weight2d;
238 uint8_t reserved1e[0x22 - 0x1e];
239 uint16_t phy_config_override;
240 uint8_t dfimrlmargin;
241 uint8_t r0_rx_clk_dly_margin;
242 uint8_t r0_vref_dac_margin;
243 uint8_t r0_tx_dq_dly_margin;
244 uint8_t r0_device_vref_margin;
245 uint8_t reserved29[0x33 - 0x29];
246 uint8_t r1_rx_clk_dly_margin;
247 uint8_t r1_vref_dac_margin;
248 uint8_t r1_tx_dq_dly_margin;
249 uint8_t r1_device_vref_margin;
250 uint8_t reserved37[0x41 - 0x37];
251 uint8_t r2_rx_clk_dly_margin;
252 uint8_t r2_vref_dac_margin;
253 uint8_t r2_tx_dq_dly_margin;
254 uint8_t r2_device_vref_margin;
255 uint8_t reserved45[0x4f - 0x45];
256 uint8_t r3_rx_clk_dly_margin;
257 uint8_t r3_vref_dac_margin;
258 uint8_t r3_tx_dq_dly_margin;
259 uint8_t r3_device_vref_margin;
260 uint8_t reserved53[0x5e - 0x53];
261 uint16_t mr0;
262 uint16_t mr1;
263 uint16_t mr2;
264 uint16_t mr3;
265 uint16_t mr4;
266 uint16_t mr5;
267 uint16_t mr6;
268 uint8_t x16present;
269 uint8_t cs_setup_gddec;
270 uint16_t rtt_nom_wr_park0;
271 uint16_t rtt_nom_wr_park1;
272 uint16_t rtt_nom_wr_park2;
273 uint16_t rtt_nom_wr_park3;
274 uint16_t rtt_nom_wr_park4;
275 uint16_t rtt_nom_wr_park5;
276 uint16_t rtt_nom_wr_park6;
277 uint16_t rtt_nom_wr_park7;
278 uint8_t acsm_odt_ctrl0;
279 uint8_t acsm_odt_ctrl1;
280 uint8_t acsm_odt_ctrl2;
281 uint8_t acsm_odt_ctrl3;
282 uint8_t acsm_odt_ctrl4;
283 uint8_t acsm_odt_ctrl5;
284 uint8_t acsm_odt_ctrl6;
285 uint8_t acsm_odt_ctrl7;
286 uint8_t vref_dq_r0nib0;
287 uint8_t vref_dq_r0nib1;
288 uint8_t vref_dq_r0nib2;
289 uint8_t vref_dq_r0nib3;
290 uint8_t vref_dq_r0nib4;
291 uint8_t vref_dq_r0nib5;
292 uint8_t vref_dq_r0nib6;
293 uint8_t vref_dq_r0nib7;
294 uint8_t vref_dq_r0nib8;
295 uint8_t vref_dq_r0nib9;
296 uint8_t vref_dq_r0nib10;
297 uint8_t vref_dq_r0nib11;
298 uint8_t vref_dq_r0nib12;
299 uint8_t vref_dq_r0nib13;
300 uint8_t vref_dq_r0nib14;
301 uint8_t vref_dq_r0nib15;
302 uint8_t vref_dq_r0nib16;
303 uint8_t vref_dq_r0nib17;
304 uint8_t vref_dq_r0nib18;
305 uint8_t vref_dq_r0nib19;
306 uint8_t vref_dq_r1nib0;
307 uint8_t vref_dq_r1nib1;
308 uint8_t vref_dq_r1nib2;
309 uint8_t vref_dq_r1nib3;
310 uint8_t vref_dq_r1nib4;
311 uint8_t vref_dq_r1nib5;
312 uint8_t vref_dq_r1nib6;
313 uint8_t vref_dq_r1nib7;
314 uint8_t vref_dq_r1nib8;
315 uint8_t vref_dq_r1nib9;
316 uint8_t vref_dq_r1nib10;
317 uint8_t vref_dq_r1nib11;
318 uint8_t vref_dq_r1nib12;
319 uint8_t vref_dq_r1nib13;
320 uint8_t vref_dq_r1nib14;
321 uint8_t vref_dq_r1nib15;
322 uint8_t vref_dq_r1nib16;
323 uint8_t vref_dq_r1nib17;
324 uint8_t vref_dq_r1nib18;
325 uint8_t vref_dq_r1nib19;
326 uint8_t vref_dq_r2nib0;
327 uint8_t vref_dq_r2nib1;
328 uint8_t vref_dq_r2nib2;
329 uint8_t vref_dq_r2nib3;
330 uint8_t vref_dq_r2nib4;
331 uint8_t vref_dq_r2nib5;
332 uint8_t vref_dq_r2nib6;
333 uint8_t vref_dq_r2nib7;
334 uint8_t vref_dq_r2nib8;
335 uint8_t vref_dq_r2nib9;
336 uint8_t vref_dq_r2nib10;
337 uint8_t vref_dq_r2nib11;
338 uint8_t vref_dq_r2nib12;
339 uint8_t vref_dq_r2nib13;
340 uint8_t vref_dq_r2nib14;
341 uint8_t vref_dq_r2nib15;
342 uint8_t vref_dq_r2nib16;
343 uint8_t vref_dq_r2nib17;
344 uint8_t vref_dq_r2nib18;
345 uint8_t vref_dq_r2nib19;
346 uint8_t vref_dq_r3nib0;
347 uint8_t vref_dq_r3nib1;
348 uint8_t vref_dq_r3nib2;
349 uint8_t vref_dq_r3nib3;
350 uint8_t vref_dq_r3nib4;
351 uint8_t vref_dq_r3nib5;
352 uint8_t vref_dq_r3nib6;
353 uint8_t vref_dq_r3nib7;
354 uint8_t vref_dq_r3nib8;
355 uint8_t vref_dq_r3nib9;
356 uint8_t vref_dq_r3nib10;
357 uint8_t vref_dq_r3nib11;
358 uint8_t vref_dq_r3nib12;
359 uint8_t vref_dq_r3nib13;
360 uint8_t vref_dq_r3nib14;
361 uint8_t vref_dq_r3nib15;
362 uint8_t vref_dq_r3nib16;
363 uint8_t vref_dq_r3nib17;
364 uint8_t vref_dq_r3nib18;
365 uint8_t vref_dq_r3nib19;
366 uint8_t reserved_d6[0x3f6 - 0xd6];
367 uint16_t alt_cas_l;
368 uint8_t alt_wcas_l;
369 uint8_t d4misc;