Lines Matching defs:ddr4r1d
372 struct ddr4r1d { struct
373 uint8_t reserved00;
374 uint8_t msg_misc;
375 uint16_t pmu_revision;
376 uint8_t pstate;
377 uint8_t pll_bypass_en;
378 uint16_t dramfreq;
379 uint8_t dfi_freq_ratio;
380 uint8_t bpznres_val;
381 uint8_t phy_odt_impedance;
382 uint8_t phy_drv_impedance;
383 uint8_t phy_vref;
384 uint8_t dram_type;
385 uint8_t disabled_dbyte;
386 uint8_t enabled_dqs;
387 uint8_t cs_present;
388 uint8_t cs_present_d0;
389 uint8_t cs_present_d1;
390 uint8_t addr_mirror;
391 uint8_t cs_test_fail;
392 uint8_t phy_cfg;
393 uint16_t sequence_ctrl;
394 uint8_t hdt_ctrl;
395 uint8_t reserved19[0x22 - 0x19];
396 uint16_t phy_config_override;
397 uint8_t dfimrlmargin;
398 int8_t cdd_rr_3_2;
399 int8_t cdd_rr_3_1;
400 int8_t cdd_rr_3_0;
401 int8_t cdd_rr_2_3;
402 int8_t cdd_rr_2_1;
403 int8_t cdd_rr_2_0;
404 int8_t cdd_rr_1_3;
405 int8_t cdd_rr_1_2;
406 int8_t cdd_rr_1_0;
407 int8_t cdd_rr_0_3;
408 int8_t cdd_rr_0_2;
409 int8_t cdd_rr_0_1;
410 int8_t cdd_ww_3_2;
411 int8_t cdd_ww_3_1;
412 int8_t cdd_ww_3_0;
413 int8_t cdd_ww_2_3;
414 int8_t cdd_ww_2_1;
415 int8_t cdd_ww_2_0;
416 int8_t cdd_ww_1_3;
417 int8_t cdd_ww_1_2;
418 int8_t cdd_ww_1_0;
419 int8_t cdd_ww_0_3;
420 int8_t cdd_ww_0_2;
421 int8_t cdd_ww_0_1;
422 int8_t cdd_rw_3_3;
423 int8_t cdd_rw_3_2;
424 int8_t cdd_rw_3_1;
425 int8_t cdd_rw_3_0;
426 int8_t cdd_rw_2_3;
427 int8_t cdd_rw_2_2;
428 int8_t cdd_rw_2_1;
429 int8_t cdd_rw_2_0;
430 int8_t cdd_rw_1_3;
431 int8_t cdd_rw_1_2;
432 int8_t cdd_rw_1_1;
433 int8_t cdd_rw_1_0;
434 int8_t cdd_rw_0_3;
435 int8_t cdd_rw_0_2;
436 int8_t cdd_rw_0_1;
437 int8_t cdd_rw_0_0;
438 int8_t cdd_wr_3_3;
439 int8_t cdd_wr_3_2;
440 int8_t cdd_wr_3_1;
441 int8_t cdd_wr_3_0;
442 int8_t cdd_wr_2_3;
443 int8_t cdd_wr_2_2;
444 int8_t cdd_wr_2_1;
445 int8_t cdd_wr_2_0;
446 int8_t cdd_wr_1_3;
447 int8_t cdd_wr_1_2;
448 int8_t cdd_wr_1_1;
449 int8_t cdd_wr_1_0;
450 int8_t cdd_wr_0_3;
451 int8_t cdd_wr_0_2;
452 int8_t cdd_wr_0_1;
453 int8_t cdd_wr_0_0;
454 uint8_t reserved5d;
455 uint16_t mr0;
456 uint16_t mr1;
457 uint16_t mr2;
458 uint16_t mr3;
459 uint16_t mr4;
460 uint16_t mr5;
461 uint16_t mr6;
462 uint8_t x16present;
463 uint8_t cs_setup_gddec;
464 uint16_t rtt_nom_wr_park0;
465 uint16_t rtt_nom_wr_park1;
466 uint16_t rtt_nom_wr_park2;
467 uint16_t rtt_nom_wr_park3;
468 uint16_t rtt_nom_wr_park4;
469 uint16_t rtt_nom_wr_park5;
470 uint16_t rtt_nom_wr_park6;
471 uint16_t rtt_nom_wr_park7;
472 uint8_t acsm_odt_ctrl0;
473 uint8_t acsm_odt_ctrl1;
474 uint8_t acsm_odt_ctrl2;
475 uint8_t acsm_odt_ctrl3;
476 uint8_t acsm_odt_ctrl4;
477 uint8_t acsm_odt_ctrl5;
478 uint8_t acsm_odt_ctrl6;
479 uint8_t acsm_odt_ctrl7;
480 uint8_t vref_dq_r0nib0;
481 uint8_t vref_dq_r0nib1;
482 uint8_t vref_dq_r0nib2;
483 uint8_t vref_dq_r0nib3;
484 uint8_t vref_dq_r0nib4;
485 uint8_t vref_dq_r0nib5;
486 uint8_t vref_dq_r0nib6;
487 uint8_t vref_dq_r0nib7;
488 uint8_t vref_dq_r0nib8;
489 uint8_t vref_dq_r0nib9;
490 uint8_t vref_dq_r0nib10;
491 uint8_t vref_dq_r0nib11;
492 uint8_t vref_dq_r0nib12;
493 uint8_t vref_dq_r0nib13;
494 uint8_t vref_dq_r0nib14;
495 uint8_t vref_dq_r0nib15;
496 uint8_t vref_dq_r0nib16;
497 uint8_t vref_dq_r0nib17;
498 uint8_t vref_dq_r0nib18;
499 uint8_t vref_dq_r0nib19;
500 uint8_t vref_dq_r1nib0;
501 uint8_t vref_dq_r1nib1;
502 uint8_t vref_dq_r1nib2;
503 uint8_t vref_dq_r1nib3;
504 uint8_t vref_dq_r1nib4;
505 uint8_t vref_dq_r1nib5;
506 uint8_t vref_dq_r1nib6;
507 uint8_t vref_dq_r1nib7;
508 uint8_t vref_dq_r1nib8;
509 uint8_t vref_dq_r1nib9;
510 uint8_t vref_dq_r1nib10;
511 uint8_t vref_dq_r1nib11;
512 uint8_t vref_dq_r1nib12;
513 uint8_t vref_dq_r1nib13;
514 uint8_t vref_dq_r1nib14;
515 uint8_t vref_dq_r1nib15;
516 uint8_t vref_dq_r1nib16;
517 uint8_t vref_dq_r1nib17;
518 uint8_t vref_dq_r1nib18;
519 uint8_t vref_dq_r1nib19;
520 uint8_t vref_dq_r2nib0;
521 uint8_t vref_dq_r2nib1;
522 uint8_t vref_dq_r2nib2;
523 uint8_t vref_dq_r2nib3;
524 uint8_t vref_dq_r2nib4;
525 uint8_t vref_dq_r2nib5;
526 uint8_t vref_dq_r2nib6;
527 uint8_t vref_dq_r2nib7;
528 uint8_t vref_dq_r2nib8;
529 uint8_t vref_dq_r2nib9;
530 uint8_t vref_dq_r2nib10;
531 uint8_t vref_dq_r2nib11;
532 uint8_t vref_dq_r2nib12;
533 uint8_t vref_dq_r2nib13;
534 uint8_t vref_dq_r2nib14;
535 uint8_t vref_dq_r2nib15;
536 uint8_t vref_dq_r2nib16;
537 uint8_t vref_dq_r2nib17;
538 uint8_t vref_dq_r2nib18;
539 uint8_t vref_dq_r2nib19;
540 uint8_t vref_dq_r3nib0;
541 uint8_t vref_dq_r3nib1;
542 uint8_t vref_dq_r3nib2;
543 uint8_t vref_dq_r3nib3;
544 uint8_t vref_dq_r3nib4;
545 uint8_t vref_dq_r3nib5;
546 uint8_t vref_dq_r3nib6;
547 uint8_t vref_dq_r3nib7;
548 uint8_t vref_dq_r3nib8;
549 uint8_t vref_dq_r3nib9;
550 uint8_t vref_dq_r3nib10;
551 uint8_t vref_dq_r3nib11;
552 uint8_t vref_dq_r3nib12;
553 uint8_t vref_dq_r3nib13;
554 uint8_t vref_dq_r3nib14;
555 uint8_t vref_dq_r3nib15;
556 uint8_t vref_dq_r3nib16;
557 uint8_t vref_dq_r3nib17;
558 uint8_t vref_dq_r3nib18;
559 uint8_t vref_dq_r3nib19;
560 uint8_t f0rc00_d0;
561 uint8_t f0rc01_d0;
562 uint8_t f0rc02_d0;
563 uint8_t f0rc03_d0;
564 uint8_t f0rc04_d0;
565 uint8_t f0rc05_d0;
566 uint8_t f0rc06_d0;
567 uint8_t f0rc07_d0;
568 uint8_t f0rc08_d0;
569 uint8_t f0rc09_d0;
570 uint8_t f0rc0a_d0;
571 uint8_t f0rc0b_d0;
572 uint8_t f0rc0c_d0;
573 uint8_t f0rc0d_d0;
574 uint8_t f0rc0e_d0;
575 uint8_t f0rc0f_d0;
576 uint8_t f0rc1x_d0;
577 uint8_t f0rc2x_d0;
578 uint8_t f0rc3x_d0;
579 uint8_t f0rc4x_d0;
580 uint8_t f0rc5x_d0;
581 uint8_t f0rc6x_d0;
582 uint8_t f0rc7x_d0;
583 uint8_t f0rc8x_d0;
584 uint8_t f0rc9x_d0;
585 uint8_t f0rcax_d0;
586 uint8_t f0rcbx_d0;
587 uint8_t f1rc00_d0;
588 uint8_t f1rc01_d0;
589 uint8_t f1rc02_d0;
590 uint8_t f1rc03_d0;
591 uint8_t f1rc04_d0;
592 uint8_t f1rc05_d0;
593 uint8_t f1rc06_d0;
594 uint8_t f1rc07_d0;
595 uint8_t f1rc08_d0;
596 uint8_t f1rc09_d0;
597 uint8_t f1rc0a_d0;
598 uint8_t f1rc0b_d0;
599 uint8_t f1rc0c_d0;
600 uint8_t f1rc0d_d0;
601 uint8_t f1rc0e_d0;
602 uint8_t f1rc0f_d0;
603 uint8_t f1rc1x_d0;
604 uint8_t f1rc2x_d0;
605 uint8_t f1rc3x_d0;
606 uint8_t f1rc4x_d0;
607 uint8_t f1rc5x_d0;
608 uint8_t f1rc6x_d0;
609 uint8_t f1rc7x_d0;
610 uint8_t f1rc8x_d0;
611 uint8_t f1rc9x_d0;
612 uint8_t f1rcax_d0;
613 uint8_t f1rcbx_d0;
614 uint8_t f0rc00_d1;
615 uint8_t f0rc01_d1;
616 uint8_t f0rc02_d1;
617 uint8_t f0rc03_d1;
618 uint8_t f0rc04_d1;
619 uint8_t f0rc05_d1;
620 uint8_t f0rc06_d1;
621 uint8_t f0rc07_d1;
622 uint8_t f0rc08_d1;
623 uint8_t f0rc09_d1;
624 uint8_t f0rc0a_d1;
625 uint8_t f0rc0b_d1;
626 uint8_t f0rc0c_d1;
627 uint8_t f0rc0d_d1;
628 uint8_t f0rc0e_d1;
629 uint8_t f0rc0f_d1;
630 uint8_t f0rc1x_d1;
631 uint8_t f0rc2x_d1;
632 uint8_t f0rc3x_d1;
633 uint8_t f0rc4x_d1;
634 uint8_t f0rc5x_d1;
635 uint8_t f0rc6x_d1;
636 uint8_t f0rc7x_d1;
637 uint8_t f0rc8x_d1;
638 uint8_t f0rc9x_d1;
639 uint8_t f0rcax_d1;
640 uint8_t f0rcbx_d1;
641 uint8_t f1rc00_d1;
642 uint8_t f1rc01_d1;
643 uint8_t f1rc02_d1;
644 uint8_t f1rc03_d1;
645 uint8_t f1rc04_d1;
646 uint8_t f1rc05_d1;
647 uint8_t f1rc06_d1;
648 uint8_t f1rc07_d1;
649 uint8_t f1rc08_d1;
650 uint8_t f1rc09_d1;
651 uint8_t f1rc0a_d1;
652 uint8_t f1rc0b_d1;
653 uint8_t f1rc0c_d1;
654 uint8_t f1rc0d_d1;
655 uint8_t f1rc0e_d1;
656 uint8_t f1rc0f_d1;
657 uint8_t f1rc1x_d1;
658 uint8_t f1rc2x_d1;
659 uint8_t f1rc3x_d1;
660 uint8_t f1rc4x_d1;
661 uint8_t f1rc5x_d1;
662 uint8_t f1rc6x_d1;
663 uint8_t f1rc7x_d1;
664 uint8_t f1rc8x_d1;
665 uint8_t f1rc9x_d1;
666 uint8_t f1rcax_d1;
667 uint8_t f1rcbx_d1;
668 uint8_t reserved142[0x3f6 - 0x142];
669 uint16_t alt_cas_l;
670 uint8_t alt_wcas_l;
671 uint8_t d4misc;