Lines Matching refs:spi_read_cache_op
97 if (spinand_dev.spi_read_cache_op.data.buswidth == in spi_nand_quad_enable()
186 spinand_dev.spi_read_cache_op.addr.val = offset; in spi_nand_read_from_cache()
189 spinand_dev.spi_read_cache_op.addr.val |= 1U << page_sh; in spi_nand_read_from_cache()
192 spinand_dev.spi_read_cache_op.data.buf = buffer; in spi_nand_read_from_cache()
193 spinand_dev.spi_read_cache_op.data.nbytes = len; in spi_nand_read_from_cache()
195 return spi_mem_exec_op(&spinand_dev.spi_read_cache_op); in spi_nand_read_from_cache()
276 spinand_dev.spi_read_cache_op.cmd.opcode = SPI_NAND_OP_READ_FROM_CACHE; in spi_nand_init()
277 spinand_dev.spi_read_cache_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()
278 spinand_dev.spi_read_cache_op.addr.nbytes = 2U; in spi_nand_init()
279 spinand_dev.spi_read_cache_op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()
280 spinand_dev.spi_read_cache_op.dummy.nbytes = 1U; in spi_nand_init()
281 spinand_dev.spi_read_cache_op.dummy.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()
282 spinand_dev.spi_read_cache_op.data.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()