351 	reg_set(addr, data, mask);  in mvebu_cp110_polarity_invert()
393 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
396 	reg_set(comphy_addr + COMMON_PHY_CFG6_REG,  in mvebu_cp110_comphy_sata_power_on()
405 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
413 	reg_set(hpipe_addr + HPIPE_MISC_REG,  in mvebu_cp110_comphy_sata_power_on()
422 	reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
424 	reg_set(hpipe_addr + HPIPE_INTERFACE_REG,  in mvebu_cp110_comphy_sata_power_on()
428 	reg_set(hpipe_addr + HPIPE_LOOPBACK_REG,  in mvebu_cp110_comphy_sata_power_on()
447 	reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
459 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
476 	reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
497 	reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
514 	reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
519 	reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
522 	reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
527 	reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
532 	reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask);  in mvebu_cp110_comphy_sata_power_on()
539 	reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
554 	reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
559 	reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
568 	reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
571 	reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
574 	reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
588 	reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
597 	reg_set(hpipe_addr + HPIPE_G1_SET_2_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
611 	reg_set(hpipe_addr + HPIPE_G2_SET_0_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
620 	reg_set(hpipe_addr + HPIPE_G2_SET_2_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
638 	reg_set(hpipe_addr + HPIPE_G3_SET_0_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
647 	reg_set(hpipe_addr + HPIPE_G3_SET_2_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
652 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, data, mask);  in mvebu_cp110_comphy_sata_power_on()
655 	reg_set(hpipe_addr + HPIPE_PWR_CTR_REG,  in mvebu_cp110_comphy_sata_power_on()
658 	reg_set(hpipe_addr + HPIPE_PWR_CTR_REG,  in mvebu_cp110_comphy_sata_power_on()
667 	reg_set(hpipe_addr + HPIPE_PWR_CTR_REG,  in mvebu_cp110_comphy_sata_power_on()
670 	reg_set(hpipe_addr + HPIPE_PWR_CTR_REG,  in mvebu_cp110_comphy_sata_power_on()
705 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
733 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
742 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
749 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
759 	reg_set(comphy_addr + COMMON_PHY_CFG6_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
766 	reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
772 	reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
776 	reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
782 	reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
786 	reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
791 	reg_set(hpipe_addr + HPIPE_G1_SET_0_REG,  in mvebu_cp110_comphy_sgmii_power_on()
803 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
812 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
830 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_sgmii_power_on()
898 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
905 	reg_set(comphy_addr + COMMON_PHY_CFG6_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
920 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
929 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
937 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
948 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
959 	reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
965 	reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
969 	reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
975 	reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
979 	reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
995 	reg_set(hpipe_addr + HPIPE_SPD_DIV_FORCE_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1002 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1006 	reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1026 	reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1034 	reg_set(hpipe_addr + HPIPE_G1_SET_2_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1040 	reg_set(hpipe_addr + HPIPE_TX_REG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1046 	reg_set(hpipe_addr + HPIPE_CAL_REG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1050 	reg_set(hpipe_addr + HPIPE_G1_SETTING_5_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1076 	reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1083 	reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1088 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1100 		reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1110 		reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1115 		reg_set(hpipe_addr +  in mvebu_cp110_comphy_xfi_power_on()
1122 		reg_set(hpipe_addr +  in mvebu_cp110_comphy_xfi_power_on()
1129 		reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1135 		reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1141 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1146 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1151 	reg_set(hpipe_addr + HPIPE_TX_PRESET_INDEX_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1156 	reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1163 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1168 	reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_0_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1173 	reg_set(hpipe_addr + HPIPE_DME_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1178 	reg_set(hpipe_addr + HPIPE_VDD_CAL_0_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1185 	reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1188 	reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1193 	reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1203 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1224 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1242 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_xfi_power_on()
1338 			reg_set(comphy_base + COMMON_PHY_SD_CTRL1,  in mvebu_cp110_comphy_pcie_power_on()
1343 			reg_set(comphy_base + COMMON_PHY_SD_CTRL1, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1355 		reg_set(DFX_FROM_COMPHY_ADDR(comphy_base) +  in mvebu_cp110_comphy_pcie_power_on()
1371 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1378 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1396 	reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1406 	reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1422 	reg_set(hpipe_addr + HPIPE_CLK_SRC_HI_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1426 	reg_set(hpipe_addr + HPIPE_LANE_EQ_CFG1_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1430 	reg_set(hpipe_addr + HPIPE_DFE_CTRL_28_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1457 	reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1470 	reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1476 		reg_set(hpipe_addr + HPIPE_LANE_ALIGN_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1483 		reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL,  in mvebu_cp110_comphy_pcie_power_on()
1496 	reg_set(hpipe_addr + HPIPE_INTERFACE_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1504 	reg_set(hpipe_addr + HPIPE_PCIE_REG0, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1515 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1523 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1533 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_11_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1544 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1549 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1554 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_4_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1560 	reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1565 	reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1570 	reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1575 	reg_set(hpipe_addr + HPIPE_DFE_REG0,  data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1586 	reg_set(hpipe_addr + HPIPE_G3_SET_1_REG,  data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1591 	reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1593 	reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, 0, mask);  in mvebu_cp110_comphy_pcie_power_on()
1600 	reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1605 	reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1616 	reg_set(hpipe_addr + HPIPE_CDR_CONTROL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1620 	reg_set(hpipe_addr + HPIPE_DFE_CONTROL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1629 	reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1634 	reg_set(hpipe_addr + HPIPE_G2_SETTINGS_4_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1639 	reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1644 	reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1649 	reg_set(hpipe_addr + HPIPE_G3_SETTING_5_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1658 	reg_set(hpipe_addr + HPIPE_LANE_EQ_REMOTE_SETTING_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1662 	reg_set(hpipe_addr + HPIPE_LANE_EQ_CFG2_REG, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1679 			reg_set(comphy_base + COMMON_PHY_SD_CTRL1, data, mask);  in mvebu_cp110_comphy_pcie_power_on()
1688 			reg_set(HPIPE_ADDR(  in mvebu_cp110_comphy_pcie_power_on()
1699 			reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG,  in mvebu_cp110_comphy_pcie_power_on()
1723 			reg_set(comphy_base + COMMON_PHY_SD_CTRL1,  in mvebu_cp110_comphy_pcie_power_on()
1774 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1777 		reg_set(comphy_base + COMMON_PHY_SD_CTRL1,  in mvebu_cp110_comphy_rxaui_power_on()
1782 		reg_set(comphy_base + COMMON_PHY_SD_CTRL1,  in mvebu_cp110_comphy_rxaui_power_on()
1802 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1811 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1817 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1825 	reg_set(hpipe_addr + HPIPE_MISC_REG,  in mvebu_cp110_comphy_rxaui_power_on()
1833 	reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1835 	reg_set(hpipe_addr + HPIPE_LOOPBACK_REG,  in mvebu_cp110_comphy_rxaui_power_on()
1842 	reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1844 	reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG,  in mvebu_cp110_comphy_rxaui_power_on()
1851 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG,  in mvebu_cp110_comphy_rxaui_power_on()
1855 	reg_set(hpipe_addr + HPIPE_DFE_REG0, 0x1 << HPIPE_DFE_RES_FORCE_OFFSET,  in mvebu_cp110_comphy_rxaui_power_on()
1858 	reg_set(hpipe_addr + HPIPE_G1_SET_0_REG,  in mvebu_cp110_comphy_rxaui_power_on()
1868 	reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1874 	reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1879 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1889 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1908 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG,  in mvebu_cp110_comphy_rxaui_power_on()
1930 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_rxaui_power_on()
1974 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_usb3_power_on()
1981 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_usb3_power_on()
2000 	reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask);  in mvebu_cp110_comphy_usb3_power_on()
2002 	reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG,  in mvebu_cp110_comphy_usb3_power_on()
2006 	reg_set(hpipe_addr + HPIPE_MISC_REG,  in mvebu_cp110_comphy_usb3_power_on()
2015 	reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask);  in mvebu_cp110_comphy_usb3_power_on()
2017 	reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL,  in mvebu_cp110_comphy_usb3_power_on()
2021 	reg_set(hpipe_addr + HPIPE_INTERFACE_REG,  in mvebu_cp110_comphy_usb3_power_on()
2025 	reg_set(hpipe_addr + HPIPE_LOOPBACK_REG,  in mvebu_cp110_comphy_usb3_power_on()
2029 	reg_set(hpipe_addr + HPIPE_LANE_CONFIG0_REG,  in mvebu_cp110_comphy_usb3_power_on()
2033 	reg_set(hpipe_addr + HPIPE_TST_MODE_CTRL_REG,  in mvebu_cp110_comphy_usb3_power_on()
2055 	reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask);  in mvebu_cp110_comphy_usb3_power_on()
2059 	reg_set(hpipe_addr + HPIPE_G2_SET_2_REG, data, mask);  in mvebu_cp110_comphy_usb3_power_on()
2064 	reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG,  in mvebu_cp110_comphy_usb3_power_on()
2101 	reg_set(hpipe_addr + HPIPE_TRX0_REG, data, mask);  in rx_pre_train()
2108 	reg_set(hpipe_addr + HPIPE_TRX_REG2, data, mask);  in rx_pre_train()
2112 	reg_set(hpipe_addr + HPIPE_TRX_REG1, data, mask);  in rx_pre_train()
2116 	reg_set(hpipe_addr + HPIPE_CDR_CONTROL1_REG, data, mask);  in rx_pre_train()
2120 	reg_set(hpipe_addr + HPIPE_CDR_CONTROL2_REG, data, mask);  in rx_pre_train()
2124 	reg_set(hpipe_addr + HPIPE_CDR_CONTROL_REG, data, mask);  in rx_pre_train()
2130 	reg_set(hpipe_addr + HPIPE_TRX_REG1, data, mask);  in rx_pre_train()
2156 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2161 	reg_set(hpipe_addr + HPIPE_RX_CLK_ALIGN90_AND_TX_IDLE_CALIB_CTRL_REG,  in mvebu_cp110_comphy_xfi_rx_training()
2167 	reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2173 	reg_set(hpipe_addr + HPIPE_TRX_TRAIN_CTRL_0_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2203 	reg_set(hpipe_addr + HPIPE_TRX_TRAIN_CTRL_0_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2243 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2248 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2255 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2260 	reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2265 	reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask);  in mvebu_cp110_comphy_xfi_rx_training()
2317 	reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_ap_power_on()
2357 		reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_digital_reset()
2487 	reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask);  in mvebu_cp110_comphy_power_off()
2519 	reg_set(comphy_ip_addr + COMMON_PHY_CFG1_REG, data, mask);  in mvebu_cp110_comphy_power_off()