Lines Matching refs:ref_clk
291 uint32_t offset, data = 0, ref_clk; in mvebu_a3700_comphy_sata_power_on() local
325 ref_clk = REF_FREF_SEL_SERDES_40MHZ; in mvebu_a3700_comphy_sata_power_on()
327 ref_clk = REF_FREF_SEL_SERDES_25MHZ; in mvebu_a3700_comphy_sata_power_on()
329 comphy_sata_set_indirect(comphy_indir_regs, offset, ref_clk | PHY_MODE_SATA, in mvebu_a3700_comphy_sata_power_on()
616 uint32_t mask, data, cfg, ref_clk; in mvebu_a3700_comphy_usb3_power_on() local
705 ref_clk = REF_FREF_SEL_PCIE_USB3_40MHZ; in mvebu_a3700_comphy_usb3_power_on()
710 ref_clk = REF_FREF_SEL_PCIE_USB3_25MHZ; in mvebu_a3700_comphy_usb3_power_on()
718 PU_TX_INTP_BIT | PU_DFE_BIT | PHY_MODE_USB3 | ref_clk; in mvebu_a3700_comphy_usb3_power_on()
812 uint32_t ref_clk; in mvebu_a3700_comphy_pcie_power_on() local
862 ref_clk = REF_FREF_SEL_PCIE_USB3_40MHZ; in mvebu_a3700_comphy_pcie_power_on()
864 ref_clk = REF_FREF_SEL_PCIE_USB3_25MHZ; in mvebu_a3700_comphy_pcie_power_on()
868 PU_TX_INTP_BIT | PU_DFE_BIT | ref_clk | PHY_MODE_PCIE), in mvebu_a3700_comphy_pcie_power_on()