31 #define GIC_FMU_WRITE_64(base, reg, n, val) \  argument
42 		mmio_write_32((base) + reg##_LO + (n * 64), (val)); \
43 		mmio_write_32((base) + reg##_HI + (n * 64), (val)); \
76 #define GIC_FMU_WRITE_ON_IDLE_64(base, reg, n, val) \  argument
81 		GIC_FMU_WRITE_64(base, reg, n, val); \
94 uint64_t gic_fmu_read_errfr(uintptr_t base, unsigned int n)  in gic_fmu_read_errfr()  argument
100 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRFR_LO + n * 64U);  in gic_fmu_read_errfr()
102 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRFR_HI + n * 64U) << 32);  in gic_fmu_read_errfr()
110 uint64_t gic_fmu_read_errctlr(uintptr_t base, unsigned int n)  in gic_fmu_read_errctlr()  argument
116 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRCTLR_LO + n * 64U);  in gic_fmu_read_errctlr()
118 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRCTLR_HI + n * 64U) << 32);  in gic_fmu_read_errctlr()
126 uint64_t gic_fmu_read_errstatus(uintptr_t base, unsigned int n)  in gic_fmu_read_errstatus()  argument
132 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRSTATUS_LO + n * 64U);  in gic_fmu_read_errstatus()
134 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRSTATUS_HI + n * 64U) << 32);  in gic_fmu_read_errstatus()
203 void gic_fmu_write_errctlr(uintptr_t base, unsigned int n, uint64_t val)  in gic_fmu_write_errctlr()  argument
205 	GIC_FMU_WRITE_64(base, GICFMU_ERRCTLR, n, val);  in gic_fmu_write_errctlr()
212 void gic_fmu_write_errstatus(uintptr_t base, unsigned int n, uint64_t val)  in gic_fmu_write_errstatus()  argument
215 	GIC_FMU_WRITE_ON_IDLE_64(base, GICFMU_ERRSTATUS, n, val);  in gic_fmu_write_errstatus()