19 #define GIC_FMU_WRITE_32(base, reg, val) \  argument
25 		mmio_write_32(base + GICFMU_KEY, 0xBE); \
27 		mmio_write_32((base) + (reg), (val)); \
31 #define GIC_FMU_WRITE_64(base, reg, n, val) \  argument
37 		mmio_write_32(base + GICFMU_KEY, 0xBE); \
42 		mmio_write_32((base) + reg##_LO + (n * 64), (val)); \
43 		mmio_write_32((base) + reg##_HI + (n * 64), (val)); \
47 static void wait_until_fmu_is_idle(uintptr_t base)  in wait_until_fmu_is_idle()  argument
54 		status = (gic_fmu_read_status(base) & BIT(0));  in wait_until_fmu_is_idle()
66 #define GIC_FMU_WRITE_ON_IDLE_32(base, reg, val) \  argument
69 		wait_until_fmu_is_idle(base); \
71 		GIC_FMU_WRITE_32(base, reg, val); \
73 		wait_until_fmu_is_idle(base); \
76 #define GIC_FMU_WRITE_ON_IDLE_64(base, reg, n, val) \  argument
79 		wait_until_fmu_is_idle(base); \
81 		GIC_FMU_WRITE_64(base, reg, n, val); \
83 		wait_until_fmu_is_idle(base); \
94 uint64_t gic_fmu_read_errfr(uintptr_t base, unsigned int n)  in gic_fmu_read_errfr()  argument
100 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRFR_LO + n * 64U);  in gic_fmu_read_errfr()
102 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRFR_HI + n * 64U) << 32);  in gic_fmu_read_errfr()
110 uint64_t gic_fmu_read_errctlr(uintptr_t base, unsigned int n)  in gic_fmu_read_errctlr()  argument
116 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRCTLR_LO + n * 64U);  in gic_fmu_read_errctlr()
118 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRCTLR_HI + n * 64U) << 32);  in gic_fmu_read_errctlr()
126 uint64_t gic_fmu_read_errstatus(uintptr_t base, unsigned int n)  in gic_fmu_read_errstatus()  argument
132 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRSTATUS_LO + n * 64U);  in gic_fmu_read_errstatus()
134 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRSTATUS_HI + n * 64U) << 32);  in gic_fmu_read_errstatus()
141 uint64_t gic_fmu_read_errgsr(uintptr_t base)  in gic_fmu_read_errgsr()  argument
147 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRGSR_LO);  in gic_fmu_read_errgsr()
149 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRGSR_HI) << 32);  in gic_fmu_read_errgsr()
156 uint32_t gic_fmu_read_pingctlr(uintptr_t base)  in gic_fmu_read_pingctlr()  argument
158 	return mmio_read_32(base + GICFMU_PINGCTLR);  in gic_fmu_read_pingctlr()
164 uint32_t gic_fmu_read_pingnow(uintptr_t base)  in gic_fmu_read_pingnow()  argument
166 	return mmio_read_32(base + GICFMU_PINGNOW);  in gic_fmu_read_pingnow()
172 uint64_t gic_fmu_read_pingmask(uintptr_t base)  in gic_fmu_read_pingmask()  argument
178 	uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_PINGMASK_LO);  in gic_fmu_read_pingmask()
180 	reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_PINGMASK_HI) << 32);  in gic_fmu_read_pingmask()
187 uint32_t gic_fmu_read_status(uintptr_t base)  in gic_fmu_read_status()  argument
189 	return mmio_read_32(base + GICFMU_STATUS);  in gic_fmu_read_status()
195 uint32_t gic_fmu_read_erridr(uintptr_t base)  in gic_fmu_read_erridr()  argument
197 	return mmio_read_32(base + GICFMU_ERRIDR);  in gic_fmu_read_erridr()
203 void gic_fmu_write_errctlr(uintptr_t base, unsigned int n, uint64_t val)  in gic_fmu_write_errctlr()  argument
205 	GIC_FMU_WRITE_64(base, GICFMU_ERRCTLR, n, val);  in gic_fmu_write_errctlr()
212 void gic_fmu_write_errstatus(uintptr_t base, unsigned int n, uint64_t val)  in gic_fmu_write_errstatus()  argument
215 	GIC_FMU_WRITE_ON_IDLE_64(base, GICFMU_ERRSTATUS, n, val);  in gic_fmu_write_errstatus()
221 void gic_fmu_write_pingctlr(uintptr_t base, uint32_t val)  in gic_fmu_write_pingctlr()  argument
223 	GIC_FMU_WRITE_32(base, GICFMU_PINGCTLR, val);  in gic_fmu_write_pingctlr()
229 void gic_fmu_write_pingnow(uintptr_t base, uint32_t val)  in gic_fmu_write_pingnow()  argument
232 	GIC_FMU_WRITE_ON_IDLE_32(base, GICFMU_PINGNOW, val);  in gic_fmu_write_pingnow()
238 void gic_fmu_write_smen(uintptr_t base, uint32_t val)  in gic_fmu_write_smen()  argument
241 	GIC_FMU_WRITE_ON_IDLE_32(base, GICFMU_SMEN, val);  in gic_fmu_write_smen()
248 void gic_fmu_write_sminjerr(uintptr_t base, uint32_t val)  in gic_fmu_write_sminjerr()  argument
251 	GIC_FMU_WRITE_ON_IDLE_32(base, GICFMU_SMINJERR, val);  in gic_fmu_write_sminjerr()
257 void gic_fmu_write_pingmask(uintptr_t base, uint64_t val)  in gic_fmu_write_pingmask()  argument
259 	GIC_FMU_WRITE_64(base, GICFMU_PINGMASK, 0, val);  in gic_fmu_write_pingmask()
265 void gic_fmu_disable_all_sm_blkid(uintptr_t base, unsigned int blkid)  in gic_fmu_disable_all_sm_blkid()  argument
302 		gic_fmu_write_smen(base, smen);  in gic_fmu_disable_all_sm_blkid()