Lines Matching refs:w3
95 mov_imm w3, 24000000 /* TODO: This only works with a 24 MHz clock. */
96 cmp w1, w3
101 mov w3, #3
102 udiv w3, w1, w3
103 udiv w3, w3, w2
104 sub w3, w3, #1
105 orr w3, w3, #((1 << MESON_REG5_USE_XTAL_CLK_BIT) | \
107 str w3, [x0, #MESON_REG5_OFFSET]
109 ldr w3, [x0, #MESON_CONTROL_OFFSET]
110 orr w3, w3, #((1 << MESON_CONTROL_CLR_ERROR_BIT) | \
113 str w3, [x0, #MESON_CONTROL_OFFSET]
114 bic w3, w3, #((1 << MESON_CONTROL_CLR_ERROR_BIT) | \
117 str w3, [x0, #MESON_CONTROL_OFFSET]
119 orr w3, w3, #((1 << MESON_CONTROL_RX_ENABLE_BIT) | \
121 str w3, [x0, #MESON_CONTROL_OFFSET]