Lines Matching refs:attributes

665         uint32_t attr;      /* attributes: unused bits SBZ */
1336 element of the array specifies the interrupt number and its attributes
1671    memory regions to set the right memory attributes. When
2140 shareability, cacheability and memory attributes is accessed by multiple CPUs
2145 TF-A defines coherent memory as a region of memory with Device nGnRE attributes
2150 mismatched attributes from various CPUs are allocated in a coherent memory
2153 the Device nGnRE attributes when the MMU is turned on. Hence, at the expense of
2155 due to mismatched memory attributes.
2160 work around the issue of mismatched memory attributes by performing software
2227 and is accessed by multiple CPUs with mismatched attributes. ``bakery_lock_t`` is
2248 CPUs with mismatched memory attributes. Since these fields are a part of the
2269 into coherency issues associated with mismatched attributes.
2402 mapped with the same memory attributes. As the code needs to be executable, this
2547 mapped with ``RO``, ``EXECUTE`` attributes. After BL31 initialization has
2548 completed, the FVP changes the attributes of this section to ``RW``,
2549 ``EXECUTE_NEVER`` allowing it to be used for runtime data. The memory attributes