163 	const void *fdt = (void *)(uintptr_t)FPGA_PRELOADED_DTB_BASE;  in fpga_get_system_frequency()  local
170 	node = fdt_node_offset_by_compatible(fdt, 0, "arm,armv8-timer");  in fpga_get_system_frequency()
174 		err = fdt_read_uint32(fdt, node, "clock-frequency", &freq);  in fpga_get_system_frequency()
180 	node = fdt_node_offset_by_compatible(fdt, 0, "arm,pl011");  in fpga_get_system_frequency()
185 		err = fdt_get_reg_props_by_index(fdt, node, 0,  in fpga_get_system_frequency()
218 static void fpga_dtb_update_clock(void *fdt, unsigned int freq)  in fpga_dtb_update_clock()  argument
224 	node = fdt_node_offset_by_compatible(fdt, 0, "arm,pl011");  in fpga_dtb_update_clock()
231 	err = fdt_read_uint32(fdt, node, "clocks", &phandle);  in fpga_dtb_update_clock()
238 	node = fdt_node_offset_by_phandle(fdt, phandle);  in fpga_dtb_update_clock()
245 	err = fdt_setprop_inplace(fdt, node,  in fpga_dtb_update_clock()
258 static int fpga_dtb_set_commandline(void *fdt, const char *cmdline)  in fpga_dtb_set_commandline()  argument
265 	chosen = fdt_add_subnode(fdt, 0, "chosen");  in fpga_dtb_set_commandline()
267 		chosen = fdt_path_offset(fdt, "/chosen");  in fpga_dtb_set_commandline()
298 	err = fdt_setprop(fdt, chosen, "bootargs",  in fpga_dtb_set_commandline()
304 	return fdt_appendprop(fdt, chosen, "bootargs", &nul, 1);  in fpga_dtb_set_commandline()
309 	void *fdt = (void *)(uintptr_t)FPGA_PRELOADED_DTB_BASE;  in fpga_prepare_dtb()  local
313 	err = fdt_open_into(fdt, fdt, FPGA_MAX_DTB_SIZE);  in fpga_prepare_dtb()
315 		ERROR("cannot open devicetree at %p: %d\n", fdt, err);  in fpga_prepare_dtb()
320 	if (fdt_add_reserved_memory(fdt, "tf-a@80000000", BL31_BASE,  in fpga_prepare_dtb()
327 		err = fpga_dtb_set_commandline(fdt, cmdline);  in fpga_prepare_dtb()
341 	err = fdt_add_cpus_node(fdt, FPGA_MAX_PE_PER_CPU,  in fpga_prepare_dtb()
356 			err = fdt_adjust_gic_redist(fdt, nr_cores,  in fpga_prepare_dtb()
365 	fpga_dtb_update_clock(fdt, system_freq);  in fpga_prepare_dtb()
369 		int node = fdt_node_offset_by_compatible(fdt, 0,  in fpga_prepare_dtb()
373 			fdt_del_node(fdt, node);  in fpga_prepare_dtb()
379 		int node = fdt_node_offset_by_compatible(fdt, 0,  in fpga_prepare_dtb()
383 			fdt_del_node(fdt, node);  in fpga_prepare_dtb()
387 	err = fdt_pack(fdt);  in fpga_prepare_dtb()
389 		ERROR("Failed to pack Device Tree at %p: error %d\n", fdt, err);  in fpga_prepare_dtb()
392 	clean_dcache_range((uintptr_t)fdt, fdt_blob_size(fdt));  in fpga_prepare_dtb()