Lines Matching refs:sp
26 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
27 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
28 stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
29 stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6]
30 stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
31 stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10]
32 stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12]
33 stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14]
34 stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
35 stp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18]
36 stp x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20]
37 stp x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22]
38 stp x24, x25, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X24]
39 stp x26, x27, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X26]
40 stp x28, x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X28]
59 stp x30, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
270 ldp x30, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
291 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
292 ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
293 ldp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6]
294 ldp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
295 ldp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10]
296 ldp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12]
297 ldp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14]
298 ldp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
299 ldp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18]
300 ldp x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20]
301 ldp x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22]
302 ldp x24, x25, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X24]
303 ldp x26, x27, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X26]
304 ldp x28, x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X28]
342 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
346 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
350 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
366 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]