Lines Matching full:configuration

30 	unsigned int	timing_cfg_3;	 /* SDRAM Timing Configuration 3 */
31 	unsigned int	timing_cfg_0;	 /* SDRAM Timing Configuration 0 */
32 	unsigned int	timing_cfg_1;	 /* SDRAM Timing Configuration 1 */
33 	unsigned int	timing_cfg_2;	 /* SDRAM Timing Configuration 2 */
34 	unsigned int	sdram_cfg;	 /* SDRAM Control Configuration */
35 	unsigned int	sdram_cfg_2;	 /* SDRAM Control Configuration 2 */
36 	unsigned int	sdram_mode;	 /* SDRAM Mode Configuration */
37 	unsigned int	sdram_mode_2;	 /* SDRAM Mode Configuration 2 */
39 	unsigned int	sdram_interval;	 /* SDRAM Interval Configuration */
47 	unsigned int	timing_cfg_4;	 /* SDRAM Timing Configuration 4 */
48 	unsigned int	timing_cfg_5;	 /* SDRAM Timing Configuration 5 */
49 	unsigned int	timing_cfg_6;	 /* SDRAM Timing Configuration 6 */
50 	unsigned int	timing_cfg_7;	 /* SDRAM Timing Configuration 7 */
66 	unsigned int	sdram_mode_3;	 /* SDRAM Mode Configuration 3 */
67 	unsigned int	sdram_mode_4;	 /* SDRAM Mode Configuration 4 */
68 	unsigned int	sdram_mode_5;	 /* SDRAM Mode Configuration 5 */
69 	unsigned int	sdram_mode_6;	 /* SDRAM Mode Configuration 6 */
70 	unsigned int	sdram_mode_7;	 /* SDRAM Mode Configuration 7 */
71 	unsigned int	sdram_mode_8;	 /* SDRAM Mode Configuration 8 */
73 	unsigned int	sdram_mode_9;	 /* SDRAM Mode Configuration 9 */
74 	unsigned int	sdram_mode_10;	 /* SDRAM Mode Configuration 10 */
75 	unsigned int	sdram_mode_11;	 /* SDRAM Mode Configuration 11 */
76 	unsigned int	sdram_mode_12;	 /* SDRAM Mode Configuration 12 */
77 	unsigned int	sdram_mode_13;	 /* SDRAM Mode Configuration 13 */
78 	unsigned int	sdram_mode_14;	 /* SDRAM Mode Configuration 14 */
79 	unsigned int	sdram_mode_15;	 /* SDRAM Mode Configuration 15 */
80 	unsigned int	sdram_mode_16;	 /* SDRAM Mode Configuration 16 */
82 	unsigned int	timing_cfg_8;	 /* SDRAM Timing Configuration 8 */
83 	unsigned int	timing_cfg_9;	 /* SDRAM Timing Configuration 9 */