302 		debug("cs %d\n", i);  in cal_odt()
304 		debug("     odt_rd_cfg 0x%x\n",  in cal_odt()
307 		debug("     odt_wr_cfg 0x%x\n",  in cal_odt()
310 		debug("     odt_rtt_norm 0x%x\n",  in cal_odt()
313 		debug("     odt_rtt_wr 0x%x\n",  in cal_odt()
316 		debug("     auto_precharge %d\n",  in cal_odt()
336 	debug("ctlr_init_ecc %d\n", popts->ctlr_init_ecc);  in cal_opts()
359 	debug("x4_en %d\n", popts->x4_en);  in cal_opts()
372 	debug("ap_en %d\n", popts->ap_en);  in cal_opts()
392 	debug("ctlr_intlv %d\n", popts->ctlr_intlv);  in cal_intlv()
393 	debug("ctlr_intlv_mode %d\n", popts->ctlr_intlv_mode);  in cal_intlv()
396 	debug("ba_intlv 0x%x\n", popts->ba_intlv);  in cal_intlv()
412 	debug("data_bus_used %d\n", popts->data_bus_used);  in update_burst_length()
413 	debug("otf_burst_chop_en %d\n", popts->otf_burst_chop_en);  in update_burst_length()
414 	debug("burst_length 0x%x\n", popts->burst_length);  in update_burst_length()
427 	debug("dbw_cap_shift %d\n", popts->dbw_cap_shift);  in update_burst_length()
534 		debug("Controller %d\n", i);  in parse_spd()
536 			debug("DIMM %d\n", j);  in parse_spd()
545 			debug("addr 0x%x\n", addr);  in parse_spd()
549 				debug("Invalid SPD at address 0x%x\n", addr);  in parse_spd()
558 			debug("checksum 0x%x\n", spd_checksum[spd_idx]);  in parse_spd()
560 				debug("Bad checksum, ignored.\n");  in parse_spd()
581 		debug("done with controller %d\n", i);  in parse_spd()
619 	debug("cal cs\n");  in parse_spd()
641 		debug("cs_in_use = %x\n", conf->cs_in_use);  in parse_spd()
642 		debug("cs_on_dimm[%d] = %x\n", j, conf->cs_on_dimm[j]);  in parse_spd()
669 	debug("rank density 0x%llx\n", rank_density);  in assign_intlv_addr()
681 	debug("ctlr density mul %d\n", ctlr_density_mul);  in assign_intlv_addr()
695 	debug("Overwrite cs_in_use as %x\n", conf->cs_in_use);  in assign_intlv_addr()
701 		debug("CS %d\n", i);  in assign_intlv_addr()
702 		debug("    base_addr 0x%llx\n", conf->cs_base_addr[i]);  in assign_intlv_addr()
703 		debug("    size 0x%llx\n", conf->cs_size[i]);  in assign_intlv_addr()
720 	debug("rank density 0x%llx\n", rank_density);  in assign_non_intlv_addr()
762 		debug("CS %d\n", i);  in assign_non_intlv_addr()
763 		debug("    base_addr 0x%llx\n", conf->cs_base_addr[i]);  in assign_non_intlv_addr()
764 		debug("    size 0x%llx\n", conf->cs_size[i]);  in assign_non_intlv_addr()
782 	debug("ctlr_intlv %d\n", opt->ctlr_intlv);  in assign_addresses()
795 	debug("base 0x%llx\n", current_mem_base);  in assign_addresses()
796 	debug("Total mem by assignment is 0x%llx\n", total_mem);  in assign_addresses()
855 	debug("Parse DIMM SPD(s)\n");  in dram_init()
875 	debug("Synthesize configurations\n");  in dram_init()
882 	debug("Assign binding addresses\n");  in dram_init()
889 	debug("Calculate controller registers\n");  in dram_init()
916 	debug("Program controller registers\n");  in dram_init()